SIP11203DLP-T1-E3 Vishay, SIP11203DLP-T1-E3 Datasheet
SIP11203DLP-T1-E3
Specifications of SIP11203DLP-T1-E3
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SIP11203DLP-T1-E3 Summary of contents
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... High Efficiency Intermediate Bus Converters (IBC) • Half-bridge, full-bridge, or push-pull primary DC-DC topologies • Center-tapped or current-doubler secondary con- figurations OUT A OUT B Vin SiP11203 SiP11204 SRH SRL GND Pulse Transformer VL Cpd Rdel Optoisolator ZF2 SiP11203/SiP11204 Vishay Siliconix V OUT GND OVPin EA+ EA- Vref EAout PGND Rpd ZF1 www.vishay.com 1 ...
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... SiP11203/SiP11204 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Linear Inputs REF Storage Temperature Junction Temperature Package Thermal Impedance (Rθ Notes: a. Device mounted with all leads soldered to printed circuit board. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...
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... LOAD IN A and IN B low to OUT A/OUT B low t PDDET kΩ (Note forcing voltage bypassed by 1 µF to GND, INA or INB = 5 V, other I HOFF input = 0 V, force active output ( SiP11203/SiP11204 Vishay Siliconix Limits a b Min Typ 4.0 2.5 2.1 3.0 3.8 100 = 0 3 ± 3 ...
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... switching at 250 kHz, R DEL step and vice versa REF. PIN CONFIGURATION OUTB R INB PGND 3 INA 4 OUTA GND R ORDERING INFORMATION Part Number SiP11203DLP-T1-E3 SiP11204DLP-T1-E3 www.vishay.com 4 Test Conditions Unless Otherwise Specified 5.5 V ≤ V ≤ °C A UVLO V Rising until output transitions UVLO V Falling until output transitions off ...
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... Input pin for over voltage detection 1.225 V reference voltage for converter output voltage regulating setting Capacitor value sets power down detection time in conjunction with R Resistor value sets currents for power down detection timer and for power down discharge of outputs Driver output B Figure 1. SiP11203/SiP11204 Vishay Siliconix PD www.vishay.com 5 ...
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... SiP11203/SiP11204 Vishay Siliconix DETAILED OPERATION SUPPLY VOLTAGE ( The SiP11203/SiP11204 are designed to operate at an input voltage (V ) between 5.5 V and 13 V. The syn- IN chronous rectifier drivers (OUTA and OUTB) are pow- ered directly from facilitate setting the gate drive IN voltage for the rectifier MOSFETs. Due to the high ...
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... The OVP explained in more detail in the Applications Information section. SiP11203/SiP11204 Vishay Siliconix = 500 V/R . Such an event also PD pin to be dis- REF pin and DEL ...
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... SiP11203/SiP11204 Vishay Siliconix APPLICATIONS INFORMATION Powering SiP11203/SiP11204 The SiP11203/SiP11204 has an internal pre-regulator to provide which biases many of the internal L sub-circuits. This allows the IC to operate from any input voltage within the allowable V same time, V provides the supply voltage to the gate IN driver outputs (OUTA and OUTB) directly. The gate ...
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... REF V capacitor. This gives the following equation REF • The time from UVLO 1.1 V ≅ (1.1 V/410 µ and VL These relationships are shown in Figure 4. . SiP11203/SiP11204 Vishay Siliconix Hold-off SW1 MOSFET SW2 Hold-off MOSFET . > UVLO L R has reached its final value, the clamp ...
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... SiP11203/SiP11204 Vishay Siliconix Rate of rise determined by external 3.55 V Internal logic circuits enabled Figure 4. Soft-start parameters of the SiP11203/SiP11204 are programmable with external components NORMAL DRIVER OPERATION In normal operation, OUTA responds to INA, and OUTB to INB. The signal path from input to output is non-inverting. The output drivers have high and delib- ...
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... SiP11203/SiP11204 soft- start event). When the phase-in period has ended, the final high-going propagation delay DEL(FINAL) in the typical curves. SiP11203/SiP11204 Vishay Siliconix , which is connected be- DEL pin and ground, determines the time DEL DEL and inversely proportional to V DEL x 1.225 V)/(1 kΩ ...
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... SiP11203/SiP11204 Vishay Siliconix SYNCHRONOUS RECTIFIER PHASE-IN AND RISING EDGE DELAY (CONT’D) The three modes of operation experienced during syn- chronous rectifier phase-in are, in order • Some number of converter switching cycles may ≥ occur during which ΔT 2/f DEL this interval, the synchronous rectifiers are held off for a long enough time that they will act as conven ional diodes only ...
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... Note that the OVP the internal 2.5 V reference voltage V derived from V rise time of either V SiP11203/SiP11204 Vishay Siliconix PWM pin towards ground. The OVP REF pin must be ≤ (245 mV) REF pin must be 1.1 V, indi- ...
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... SiP11203/SiP11204 Vishay Siliconix TYPICAL CHARACTERISTICS 1.28 1.26 1.24 1.22 1.2 1.18 1. Temperature (°C) V vs. Temperature REF 4 3.5 3 2.5 2 1 (mA) Error Amp MHz (V) Supply Current Without Load vs. V www.vishay.com 14 5.25 5.15 5.05 VIN = 7.5 V 4.95 4.85 4.75 100 150 0.8 0.7 ...
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... S-61082–Rev. B, 19-Jun- DEL 300 250 200 150 100 1.6 1.5 1.4 1 1.2 1.1 1 100 150 SiP11203/SiP11204 Vishay Siliconix 7.5 V 1.5 ns/ kΩ DEL (kΩ) Rise Delay vs. R DEL (kΩ) Powerdown Timeout 100 Temperature (°C) R vs. Temperature D(SINK) www.vishay.com 150 ...
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... Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’ ...