EPF10K130EFC484-1X Altera, EPF10K130EFC484-1X Datasheet - Page 15

IC FLEX 10KE FPGA 130K 484-FBGA

EPF10K130EFC484-1X

Manufacturer Part Number
EPF10K130EFC484-1X
Description
IC FLEX 10KE FPGA 130K 484-FBGA
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet

Specifications of EPF10K130EFC484-1X

Number Of Logic Elements/cells
6656
Number Of Labs/clbs
832
Total Ram Bits
65536
Number Of I /o
369
Number Of Gates
342000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
EPF10K130EFC4841X

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EPF10K130EFC484-1X
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPF10K130EFC484-1X
Manufacturer:
ALTERA
0
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
EABs provide flexible options for driving and controlling clock signals.
Different clocks and clock enables can be used for reading and writing to
the EAB. Registers can be independently inserted on the data input, EAB
output, write address, write enable signals, read address, and read enable
signals. The global signals and the EAB local interconnect can drive write
enable, read enable, and clock enable signals. The global signals,
dedicated clock pins, and EAB local interconnect can drive the EAB clock
signals. Because the LEs drive the EAB local interconnect, the LEs can
control write enable, read enable, clear, clock, and clock enable signals.
An EAB is fed by a row interconnect and can drive out to row and column
interconnects. Each EAB output can drive up to two row channels and up
to two column channels; the unused row channel can be driven by other
LEs. This feature increases the routing resources available for EAB
outputs (see
Figures 2
and 4). The column interconnect, which is adjacent
to the EAB, has twice as many channels as other columns in the device.
Logic Array Block
An LAB consists of eight LEs, their associated carry and cascade chains,
LAB control signals, and the LAB local interconnect. The LAB provides
the coarse-grained structure to the FLEX 10KE architecture, facilitating
efficient routing with optimum device utilization and high performance
(see
Figure
7).
Altera Corporation
15

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