89TTM552BL Integrated Device Technology (Idt), 89TTM552BL Datasheet
89TTM552BL
Specifications of 89TTM552BL
Related parts for 89TTM552BL
89TTM552BL Summary of contents
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Description Description Description Description The 89TTM55x Traffic Manager chipset consists of a 89TTM552 aggregate-flow device and a 89TTM553 per-flow device. The 89TTM55x Traffic Manager manages bandwidth resources by shaping traffic to defined rate profiles and by precisely controlling the allocation ...
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IDT 89TTM552 The 89TTM552 connects seamlessly to IDT’s 89TSF family of switch fabric products. It can also operate seamlessly with network processors and switch fabrics that use one of its 16-bit LVDS interface protocols. The 89TTM552 can also directly transmit ...
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IDT 89TTM552 integrated AAL-5 SAR and DMA engine for data insertion and extraction. – Four classes of service. – Integrated AAL-5-compliant and packet-based SAR. – Programmable service rate. – Programmable queue thresholds. – Use of descriptors and DMA support for ...
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IDT 89TTM552 9TTM55x 9TTM55x 9TTM55x iagra 9TTM55x iagrams iagra iagra Data Buffer Memory (DDR SDRAM) 89TTM552 Engine (DFC) SPI-4 Streaming DSR, Interface BRX or SIX-over-LVDS Forwarding and ...
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IDT 89TTM552 89TTM552 Pin Description 89TTM552 Pin Description 89TTM552 Pin Description 89TTM552 Pin Description Note: Information in this section is subject to change. Contact your IDT FAE before making design decisions. In this data sheet, direction is indicated as follows: ...
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IDT 89TTM552 Signal Name RX_STAT_SOFP, RX_STAT_SOFN RX_STAT_DP[3:0], RX_STAT_DN[3:0] RX_STAT_PRTYP, RX_STAT_PRTYN RX_SPI4_STAT_CLK 3.3V LVTTL, 16mA RX_SPI4_STAT_D[1:0] 3.3V LVTTL, 16mA RX_VREF[1:0] 1. Note that the PIC buffer interface requires a 2.6V power supply. That means, separate power supplies are needed for the ...
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IDT 89TTM552 Signal Name LLST_CLK_CP (C), 1.5V HSTL Class 1 LLST_CLK_CN (C#) LLST_CLK_KP (K), 1.5V HSTL Class 1 LLST_CLK_KN (K#) LLST_ADDR[21:0] 1.5V HSTL Class 1 LLST_RD_N 1.5V HSTL Class 1 LLST_WR_N 1.5V HSTL Class 1 LLST_DIN[17:0] 1.5V HSTL Class 1 ...
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IDT 89TTM552 Signal Name MC_DOUT[17:0] 1.5V HSTL Class 1 MC_BW_N[1:0] 1.5V HSTL Class 1 MC_VREF[1:0] Signal Name SAR_CLK_CP (C), 1.5V HSTL Class 1 SAR_CLK_CN (C#) SAR_CLK_KP (K), 1.5V HSTL Class 1 SAR_CLK_KN (K#) SAR_ADDR[21:0] 1.5V HSTL Class 1 SAR_RD_N 1.5V ...
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IDT 89TTM552 Signal Name DRAM0_CKE 2.6V SSTL2 CMOS DRAM0_CS_N 2.6V SSTL2 CMOS DRAM0_D[71:0] 2.6V SSTL2 CMOS DDAM0_DQS[8:0] 2.6V SSTL2 CMOS DRAM0_RAS_N 2.6V SSTL2 CMOS DRAM0_WE_N 2.6V SSTL2 CMOS DRAM1_ADDR[12:0] 2.6V SSTL2 CMOS DRAM1_BNK[1:0] 2.6V SSTL2 CMOS DRAM1_CAS_N 2.6V SSTL2 CMOS ...
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IDT 89TTM552 Signal Name ZBUS_CLK no internal pullup ZBUS_GNT_N 100K internal pullup ZBUS_DEVID[4:0] 100K internal pullup ZBUS_INT_N[2:0] 3.3V drive ZBUS_DIR 3.3V drive ZBUS_REQ_N 3.3V drive ZBUS_AD[31:0] 100K internal pullup ZBUS_PRTY[1:0] 100K internal pullup ZBUS_AVALID_N ...
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IDT 89TTM552 Signal Name PLL_RX_LCK 3.3V, 16mA drive PLL_RX_RST 100K internal pulldown PLL_TX_REFCLK PLL_TX_LCK 3.3V, 16mA drive PLL_TX_RST 100K internal pulldown Signal Name SCAN_MODE_N 100K internal pullup SCAN_SHIFT_N 3.3V, 100K internal TCK 100K internal pullup TDI 100K internal pullup TDO ...
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IDT 89TTM552 Signal Name VDD18 VDD26 VDD33 VDD33(VDDP) VDDO_25V_LVDS_DSR VDDO_25V_LVDS_DST GND PLL_TX_VSSA PLL_TX_VDDA PLL_TX_VDD PLL_RX_VSSA PLL_RX_VDDA PLL_RX_VDD PLL_SYS_VSSA PLL_SYS_VDDA PLL_SYS_VDD 89TTM552 Electrical Specifications 89TTM552 Electrical Specifications 89TTM552 Electrical Specifications 89TTM552 Electrical Specifications Some data are TBD and will be published ...
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IDT 89TTM552 Operating Ranges Operating Ranges Operating Ranges Operating Ranges Symbol T Operating junction temperature range J I Input current for 1.5V power supply V15 I Input current for 1.8V power supply V18 I Input current for 2.5V power supply ...
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IDT 89TTM552 Symbol Parameter V (3.3v LVTTL) Input low voltage for 3.3V LVTTL inputs IL33 V (3.3v LVTTL) Input high voltage for 3.3V LVTTL inputs IH33 V Output low voltage for 1.5V HSTL outputs OLHSTL V Output high voltage for ...
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IDT 89TTM552 Symbol V Output voltage low Output differential voltage OD V Output offset voltage OS |DV | Change Change Output current Output ...
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IDT 89TTM552 Symbol T Statistics clock to output valid SCQV T Statistics clock to output invalid SCQX 1. The parameter is specified at 89TTM55x core clock frequency of 175 MHz. Symbol T DDR clock to address/control valid DCAV T DDR ...
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IDT 89TTM552 Symbol f Status channel clock frequency S D Status clock duty percentage COC t Status clock to output data skew SKEW t Status channel input setup time SSCLK t Status channel input hold time HSCLK 1. Clock-data alignment ...
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IDT 89TTM552 89TTM552 Thermal Considerations 89TTM552 Thermal Considerations 89TTM552 Thermal Considerations 89TTM552 Thermal Considerations This section describes the temperature and heat sink calculations for flip-chip BGA devices. Symbol Ø Thermal resistance, junction to ambient (no heat sink) JA Ø Estimated ...
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IDT 89TTM552 The following graph depicts the ambient temperature (T For system designers, specification of the maximum device junction temperature (operating) is critical, since it allows them to select a heat sink that meets the maximum ambient temperature requirements of ...
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IDT 89TTM552 ZB_PRTY[1:0] = 0x3, must be driven “HIGH” for the entire reset sequence cycles ZB_AD[31:0] = bits are set as: bit[12:0] = 0x154F = 0x1527 = 0x153a = 0x1526 = 0x1538 = 0x1525 = bit[21:13] = 0x080 = 0x060 ...
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IDT 89TTM552 Reset Sequence Timing Diagram Reset Sequence Timing Diagram Reset Sequence Timing Diagram Reset Sequence Timing Diagram Power RESET_N ZBUS_AD[ ], ZBUS_PRTY[ ] PLL_CFG_OVR PLL_RST PLL_RX_RST PLL_TX_RST PLL_DIV_RST PLL_SYS_LCK PLL_RX_LCK PLL_TX_LCK NOTE: - ZBUS_AD[ ] and ZBUS_PRTY[ ] are ...
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IDT 89TTM552 9TTM552 Pin List 9TTM552 Pin List 9TTM552 Pin List 9TTM552 Pin List Pin Signal Type A2 FLQS_DIN12 I A3 FLQS_DIN05 I A4 FLQS_DIN09 I A5 STAT_DEP09 O A6 STAT_DEP06 O A7 SAR_DIN08 I A8 ...
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IDT 89TTM552 Pin Signal Type C13 SAR_DOUT02 O C14 SAR_CLK_KN O C15 SAR_ADDR20 O C16 SAR_ADDR21 O C17 SAR_ADDR14 O C18 SAR_ADDR12 O C19 SAR_ADDR06 O C20 SAR_ADDR05 O C21 SAR_ADDR01 O C22 GND P C23 GND P C24 VDD15 ...
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IDT 89TTM552 Pin Signal Type E25 PP_VREF P E26 PP_D I E27 PP_CLK I E28 MC_CLK_KP O E29 MC_DOUT15 O E30 MC_DOUT12 O E31 MC_DOUT06 O E32 MC_DOUT04 O E33 MC_BW_N1 O E34 GND P E35 GND P E36 MC_ADDR07 ...
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IDT 89TTM552 Pin Signal Type G37 MC_DIN17 I H1 FLQS_DOUT14 O H2 FLQS_DOUT13 O H3 FLQS_DOUT15 O H4 GND P H5 STAT_CLK O H6 FLQS_DIN07 I H7 STAT_ARR12 O H8 STAT_ARR08 O H9 STAT_ARR06 O H10 LLST_DIN15 I H11 STAT_ARR05 ...
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IDT 89TTM552 Pin Signal Type K12 VDD18 P K13 VDD18 P K14 VDD18 P K15 VDD18 P K16 VDD18 P K17 VDD18 P K18 GND P K19 ZBUS_DEVID02 I K20 ZBUS_DEVID00 I K21 ZBUS_DVALID_N B K22 ZBUS_AD30 B K23 ZBUS_AD22 ...
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IDT 89TTM552 Pin Signal Type M30 ZBUS_AD01 B M31 GND P M32 SCAN_MODE_N I M33 MC_VREF0 P M34 GND P M35 MC_DIN05 I M36 MC_DIN03 I M37 MC_DIN02 I N1 TX_STAT_DN03 I N2 TX_STAT_SOFN I N3 TX_STAT_SOFP I N4 VDD33(VDDP) ...
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IDT 89TTM552 Pin Signal Type T17 VDD18 P T18 VDD18 P T19 VDD18 P T20 VDD18 P T21 VDD18 P T22 VDD18 P T27 VDD33 P T28 VDD18 P T29 ZBUS_AD03 B T30 ZBUS_AD09 B T31 PLL_DDR_BYPCLK I T32 RX_SPI4_STAT_D01 ...
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IDT 89TTM552 Pin Signal Type W19 GND P W20 GND P W21 GND P W22 GND P W28 VDDO_25V_LVDS_DSR P W29 ZBUS_AD21 B W30 ZBUS_AD16 B W31 VDD33 P W32 VDD33 P W33 GND P W34 VDDO_25V_LVDS_DSR P W35 RX_STAT_PRTYN ...
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IDT 89TTM552 Pin Signal Type AB21 VDD18 P AB22 VDD18 P AB27 PLL_RX_VDD P AB28 GND P AB29 VDD26 P AB30 VDD18 P AB31 VDD18 P AB32 GND P AB33 VDD18 B AB34 VDD18 P AB35 RX_DN12 I AB36 RX_DP12 ...
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IDT 89TTM552 Pin Signal Type AF8 VDD26 P AF9 VDD26 P AF10 GND P AF11 VDD18 P AF27 VDD18 P AF28 GND P AF29 VDD26 P AF30 VDD26 P AF31 VDD18 P AF32 GND P AF33 VDD26 P AF34 VDD26 ...
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IDT 89TTM552 Pin Signal Type AJ1 TX_PRTYP O AJ2 TX_DP00 O AJ3 TX_DN00 O AJ4 VDD26 P AJ5 DRAM0_RAS_N O AJ6 DRAM0_CS_N O AJ7 GND P AJ8 VDD26 P AJ9 VDD26 P AJ10 GND P AJ11 VDD26 P AJ12 GND ...
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IDT 89TTM552 Pin Signal Type AL13 DRAM0_D16 B AL14 DRAM0_D17 B AL15 VDD26 P AL16 VDD26 P AL17 VDD26 P AL18 GND P AL19 GND P AL20 GND P AL21 VDD26 P AL22 VDD26 P AL23 VDD26 P AL24 VDD26 ...
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IDT 89TTM552 Pin Signal Type AN25 DRAM1_D27 B AN26 DRAM1_D17 B AN27 DRAM1_D21 B AN28 DRAM1_D19 B AN29 DRAM1_D14 B AN30 DRAM1_D12 B AN31 DRAM1_D08 B AN32 DRAM1_D09 B AN33 DRAM1_D02 B AN34 VDD26 P AN35 DRAM1_D07 B AN36 DRAM1_D06 ...
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IDT 89TTM552 Pin Signal Type AR37 DRAM_CLKP00 O AT1 VDD26 P AT2 VDD26 P AT3 DRAM0_D69 B AT4 DRAM0_DQS08 B AT5 DRAM0_D66 B AT6 DRAM0_ADDR12 O AT7 DRAM0_ADDR09 O AT8 DRAM0_ADDR07 O AT9 DRAM0_ADDR03 O AT10 DRAM0_ADDR01 O AT11 DRAM0_D62 ...
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IDT 89TTM552 89TTM552 Package 89TTM552 Package 89TTM552 Package 89TTM552 Package The package is an ASE HFCBGA-HP, having 1192 pins, with 1 mm pitch ×37 pin array; and a 40 × enclosure.Figure 7 shows the package geometry. ...
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... Family Family Voltage Valid Combinations Valid Combinations Valid Combinations Valid Combinations 89TTM552BL 1192-pin FCBGA package, Commercial Temperature evision History evision History evision History evision History November 23, 2004: Initial publication by IDT. March 3, 2005: In Table 10, changed frequency for three REFCLK signals from 125 to 100 MHz. ...