5962-8949704MXA Austin Semiconductor, Inc., 5962-8949704MXA Datasheet
5962-8949704MXA
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5962-8949704MXA Summary of contents
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... Austin Semiconductor, Inc. 256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM AVAILABLE AS MILITARY SPECIFICATIONS • SMD 5962-89497 • MIL-STD-883 FEATURES • Class B High-Reliability Processing • DRAM: 262144 Words × 4 Bits SAM: 512 Words × 4 Bits • Single 5-V Power Supply (±10% Tolerance) • ...
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... RAS-low period using relatively conser- vative page-mode cycle times. The SMJ44C251B/MT42C4256 employs state-of-the-art technology for very high performance combined with improved reliability. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 VRAM VRAM VRAM VRAM ...
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... Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM SMJ44C251B/MT42C4256 Rev. 0.1 12/03 SMJ44C251B Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 VRAM VRAM VRAM VRAM VRAM MT42C4256 ...
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... Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 CAS\ ADDRESS DQ0 - DQ3 FALL RAS\ CAS\ DSF RAS\ CAS Row Tap X X Addr Point Row Tap X X Addr Point Refresh Tap X X Addr ...
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... DRAM also used to select the DRAM write-per-bit mode. Holding W\ low on the falling edge of RAS\ invokes the write- per-bit operation. The SMJ44C251B/MT42C4256 supports both the normal write-per-bit mode and the persistent write-per-bit mode. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 VRAM VRAM VRAM ...
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... POWER UP To achieve proper device operation, an initial pause of 200ms is required after power-up, followed by a minimum of eight RAS\ cycles or eight CBR cycles, a memory-to-register transfer cycle, and two SC cycles. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 VRAM VRAM VRAM ...
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... RAS\- only refresh sequence avoids any output during refresh. Exter- nally generated addresses must be supplied during RAS-only refresh. Strobing each of the 512 row addresses with RAS causes Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7 VRAM VRAM ...
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... (high). A high logic level enables a write, and a low logic level disables the write. A maximum of 16 bits (4 × 4) can be written to memory during each CAS\ cycle in the block- write mode. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 VRAM VRAM ...
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... Row address 3. Block address (A2 –A8) 4. Color-register data 5. Column-mask data 6. DQ-mask data. DQ0–DQ3 are latched on the falling edge of RAS\. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 SMJ44C251B Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 VRAM VRAM VRAM VRAM VRAM MT42C4256 ...
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... Austin Semiconductor, Inc. FIGURE 3: BLOCK-WRITE CIRCUIT BLOCK DIAGRAM FIGURE 4: EXAMPLE OF BLOCK WRITE OPERATION WITH DQ MASK AND ADDRESS MASK SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Split-register-read transfer (divides the SAM into a low • and a high half. Only one half is transferred to the SAM while the other half is read from the serial I/O port.) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 11 VRAM VRAM VRAM ...
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... DRAM into SAM. TRG\ is brought low and latched at the falling edge of RAS\. Nine row-address bits (A0–A8) are also latched at the falling edge of RAS\ to select one of the 512 rows available for transfer. The nine column- Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 12 VRAM VRAM ...
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... A normal-read transfer can be performed in three ways: early-load read transfer, real-time or midline-load read transfer, and late-load read transfer. Each of these offers the flexibility of controlling the TRG\ trailing edge in the read-transfer cycle (see Figure 7). Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 13 VRAM VRAM VRAM ...
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... QSF. In split-register read-transfer mode, QSF changes state when a boundary between the two register halves is reached (see Figure 8 and Figure 9). Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 14 VRAM VRAM ...
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... Figure 11, Case I). If there is no split-register read transfer to the inactive half during this period, the serial pointer points next to bit 256 or bit 0, respectively (see Figure 11, Case II). Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 15 VRAM VRAM ...
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... Exposure to absolute maximum rating conditions for extended periods ...................-55°C to 125°C may affect reliability. A MIN NOM 4 2.9 -1 -55 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 16 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 MAX UNIT 5 ...
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... MIN CC5 c(rd) c( MIN c(SC) t and t = MIN CC6 c(rd) c( MIN c(SC) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 17 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 MIN MAX 2.4 0.4 ±10 ±10 CC -10 -12 SAM MIN MAX ...
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... SCA 30pF a(SE) SEA 100pF dis(CH) OFF 100pF dis(G) OEZ 30pF dis(SE) SEZ L Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 18 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 UNIT -10 -12 4 MIN MAX MIN MAX 100 120 ...
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... DSW t /t su(rd) RCS t /t su(WCL) WCS t /t su(WCH) CWL t /t su(WRH) RWL Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 19 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 -10 -12 MAX MIN MAX UNIT 220 ns 220 ns 290 ...
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... RCD t /t d(CARH) RAL d(RLWL) RWD d(CAWL) AWD d(RLCH)RF CHR d(CLRL)RF CSR d(RHCL)RF RPC t d(CLGH) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 20 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 -10 -12 MIN MAX MIN MAX UNIT ...
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... SDD d(GLRH) ROH t 25 d(MSRL d(SCQSF) SQD t /t d(CLQSF) CQD d(GHQSF) TQD d(RLQSF) RQD REF Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 21 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 -10 -12 MAX MIN MAX UNIT 140 - w(RH) 40 ...
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... Depending on the user’s transition times, this may require additional RAS\ low su(WRH) is set to t min as a reference. d(RLCL) d(RLCL) applies only when the SAM was previously in serial-input mode. d(SCRL) FIGURE 12: LOAD CIRCUIT Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 22 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. FIGURE 13: Read-Cycle Timing SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 23 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Load write mask on later of W\ fall and CAS\ fall SMJ44C251B/MT42C4256 Rev. 0.1 12/03 STATE Don't Care Write Mask Valid Data Don't Care Don't Care Write Mask Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 24 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 4 5 Valid Data Valid Data ...
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... Load write mask on later of W\ fall and CAS\ fall SMJ44C251B/MT42C4256 Rev. 0.1 12/03 STATE Don't Care Write Mask Valid Data Don't Care Don't Care Write Mask Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 25 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 4 5 Valid Data Valid Data ...
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... Load write mask on later of W\ fall and CAS\ fall SMJ44C251B/MT42C4256 Rev. 0.1 12/03 STATE Don't Care Write Mask Valid Data Don't Care Don't Care Write Mask Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 26 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 4 5 Valid Data Valid Data ...
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... DSF is selected on the falling edges of RAS\ and CAS\ to select the desired write mode (normal, block write, etc.) SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 27 VRAM VRAM ...
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... RAS\. h(TRG) STATE Don't Care Write Mask Valid Data Don't Care Don't Care Write Mask Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 28 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 4 5 Valid Data Valid Data ...
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... Load write mask on later of W\ fall and CAS\ fall SMJ44C251B/MT42C4256 Rev. 0.1 12/03 STATE Don't Care Write Mask Valid Data Don't Care Don't Care Write Mask Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 29 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 4 5 Valid Data Valid Data ...
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... Austin Semiconductor, Inc. FIGURE 20: Load-Color-Register-Cycle Timing SMJ44C251B/MT42C4256 Rev. 0.1 12/03 (Early-Write Load) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 30 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. FIGURE 21: Load-Color-Register-Cycle Timing SMJ44C251B/MT42C4256 Rev. 0.1 12/03 (Delayed-Write Load) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 31 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Don't Care Column Mask L H Don't Care Column Mask DQ0 — column 0 (address DQ1 — column 1 (address DQ2 — column 2 (address DQ3 — column 3 (address Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 32 VRAM VRAM VRAM VRAM VRAM SMJ44C251B ...
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... Don't Care Column Mask L H Don't Care Column Mask DQ0 — column 0 (address DQ1 — column 1 (address DQ2 — column 2 (address DQ3 — column 3 (address Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 33 VRAM VRAM VRAM VRAM VRAM SMJ44C251B ...
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... L H DQ0 — column 0 (address DQ1 — column 1 (address column write disable DQ2 — column 2 (address column write enable DQ3 — column 3 (address Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 34 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 from the falling edge of RAS\ ...
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... Austin Semiconductor, Inc. FIGURE 25: RAS\-Only Refresh-Cycle Timing NOTES: NOTE E: In persistent write-per-bit function, W\ must be high at the falling edge of RAS\ during the refresh cycle. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 35 VRAM VRAM VRAM VRAM ...
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... Austin Semiconductor, Inc. FIGURE 26: CBR-Refresh-Cycle Timing NOTES: NOTE F: In persistent write-per-bit operation, W\ must be high at the falling edge of RAS\ during the refresh cycle. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 36 VRAM VRAM VRAM VRAM ...
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... Austin Semiconductor, Inc. FIGURE 27: Hidden-Refresh-Cycle Timing SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 37 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... NOTE G: The write-mode-control cycle is used to change the SDQs from the output mode to the input mode. This allows serial data to be written into the data register. This figure assumes that the device was originally in the serial-read mode. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 38 VRAM VRAM ...
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... Austin Semiconductor, Inc. FIGURE 29: Data-Register-to-Memory Transfer Timing, SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Serial Input Enable Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 39 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. FIGURE 30: Alternate Data-Register-to-Memory SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Transfer-Cycle Timing Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 40 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Also, the first bit to be read from the data register after TRG\ has gone high must be activated by a positive transition of SC. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Early-Load Operation min < t < min. h(TRG) h(TRG) d(RLTH Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 41 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Also, the first bit to be read from the data register after TRG\ has gone high must be activated by a positive transition of SC. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 < 0 ns. d(THRH) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 42 VRAM VRAM VRAM ...
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... Also, the first bit to be read from the data register after TRG\ has gone high must be activated by a positive transition of SC. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 < 0 ns. d(THRH) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 43 VRAM VRAM VRAM ...
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... Austin Semiconductor, Inc. FIGURE 34: Split-Register-Mode Read-Transfer-Cycle Timing SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 44 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Rev. 0.1 12/03 is met the minimum delay time between the rising edge d(MSRL) d(MSRL) requirement the minimum delay time between the d(RHMS) d(RHMS) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 45 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... NOTE T: While accessing data in the serial-data registers, the state of TRG don’t care as long as TRG\ is held high when RAS\ goes low to prevent data transfers between memory and data registers. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 46 VRAM VRAM ...
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... NOTE V: While accessing data in the serial-data registers, the state of TRG don’t care as long as TRG\ is held high when RAS\ goes low to prevent data transfers between memory and data registers. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 47 VRAM VRAM ...
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... Any transfer-write cycles occurring between the transfer-read cycle and the subsequent shifting out of data take the device out of the read mode and put it in the write mode, not allowing the reading of data. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 48 VRAM VRAM ...
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... Any transfer-write cycles occurring between the transfer-read cycle and the subsequent shifting out of data take the device out of the read mode and put it in the write mode, not allowing the reading of data. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 49 VRAM VRAM ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #500 (Package Designator DCJ) SMD 5962-89497, Case Outline T *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 50 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #109 (Package Designator C or JDM) SMD 5962-89497, Case Outline X *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 51 VRAM VRAM VRAM VRAM VRAM SMJ44C251B ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* SMD 5962-89497, Case Outline Y *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Package Designator HJM Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 52 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #203 (Package Designator EC or HMM) SMD 5962-89497, Case Outline Z *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 53 VRAM VRAM VRAM VRAM VRAM SMJ44C251B ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* Package Designator CZ or SVM SMD 5962-89497, Case Outline M *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 54 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 ...
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... Austin Semiconductor, Inc. MECHANICAL DEFINITIONS* ASI Case #302 (Package Designator F) SMD 5962-89497, Case Outline U *All measurements are in inches. SMJ44C251B/MT42C4256 Rev. 0.1 12/03 SMD SPECIFICATIONS SYMBOL MIN A 0.090 b 0.015 c 0.004 D --- E 0.380 E1 --- E2 0.180 E3 0.030 e 0.050 BSC L 0.250 Q 0.026 S1 0.000 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ...
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... SMJ44C251B EXAMPLE: SMJ44C251B 10SVM Package Device Process Type Number HMM See Note SMJ44C251B HMM See Note SMJ44C251B +125 C. Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 56 VRAM VRAM VRAM VRAM VRAM SMJ44C251B MT42C4256 Package Speed ns Process Type C - -12 ...
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... Austin Semiconductor, Inc. ASI TO DSCC PART NUMBER Package Designator C or JDM ASI Part Number SMD Part Number MT42C4256C-10/883C 5962-8949704MXA MT42C4256C-12/883C 5962-8949703MXA SMJ44C251B-10JDM** 5962-8949704MXA SMJ44C251B-12JDM** 5962-8949703MXA Package Designator EC or HMM ASI Part Number SMD Part Number MT42C4256EC-10/883C 5962-8949704MZA MT42C4256EC-12/883C 5962-8949703MZA SMJ44C251B-10HMM** 5962-8949704MZA ...