GS71116ATP-8 GSI Technology, GS71116ATP-8 Datasheet
GS71116ATP-8
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GS71116ATP-8 Summary of contents
Page 1
... DQ6 DQ7 Fine Pitch BGA 64K x 16-Bump Configuration Address input Ground No connect mm, 0.75 mm Bump Pitch (Package U) 1/15 GS71116ATP/J 10 Center Top view ...
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... A14 Package TP Row Memory Array Decoder Address Input Buffer Column Decoder I/O Buffer Control DQ 1 2/15 GS71116ATP/J ...
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... High Z Symbol Rating V –0.5 to +4.6 DD –0 +0 4.6 V max.) –0 +0 OUT ( 4.6 V max.) PD 0.7 T –55 to 150 STG 3/15 GS71116ATP/J/U V Current Not Selected ISB , ISB 1 2 Read High Z Read Write I DD Not Write, High Z Write High Z High Z Unit ...
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... Test Condition OUT OUT Test Conditions Output High OUT – 4/15 GS71116ATP/J/U Max Unit Max Unit Min Max –1 uA 1uA –1 uA 1uA 2 ...
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... OUT – 0 – 0 0.2 V 5/15 GS71116ATP/J/U –40 to 85° 150 mA 130 mA 105 © 2001, Giga Semiconductor, Inc ...
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... Rev: 1.04a 10/2002 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Conditions 1V/ V/ns 1.4 V 1.4 V Fig. 1& 2 6/15 GS71116ATP/J/U Output Load 30pF 1.4 V Output Load 2 3.3 V 589 DQ 1 434 5pF © 2001, Giga Semiconductor, Inc. ...
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... BLZ * — 3.5 — — 3 — t OHZ * — 3 — t BHZ , UB and Previous Data 7/15 GS71116ATP/J/U -8 -10 -12 Max Min Max Min Max — 10 — 12 — 8 — 10 — — 10 — 12 3.5 — 4 — 5 3.5 — 4 — 5 — ...
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... GS71116ATP/J/U tHZ tBHZ tOHZ Data valid -10 -12 Max Min Max Min Max — 10 — 12 — — 7 — 8 — — 7 — 8 — — 7 — 8 — — ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. tWC tAW tCW tBW tAS tWP tDW Data valid tWHZ High impedance tWC tAW tAS tCW tBW tWP tDW tDH Data valid High impedance 9/15 GS71116ATP/J/U tWR tDH tWLZ tWR1 © 2001, Giga Semiconductor, Inc. ...
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... Address Data In Data Out Rev: 1.04a 10/2002 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. tWC tAW tAS tCW tBW tWP tDW tDH Data valid High impedance 10/15 GS71116ATP/J/U tWR1 © 2001, Giga Semiconductor, Inc. ...
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... Detail Notes: 1. Dimension D& not include interlead flash. 2. Dimension B1 does not include dambar protrusion/intrusion. 3. Controlling dimension: inches 11/15 GS71116ATP/J/U Dimension in inch Dimension in mm min nom max min nom — — 0.148 — — 0.025 — — 0.635 — ...
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... Detail A Notes: 1. Dimension D& not include interlead flash. 2. Dimension B does not include dambar protrusion/intrusion. 3. Controlling dimension: mm 12/15 GS71116ATP/J/U Dimension in inch Dimension in mm min nom max min nom — — 0.047 — — 0.002 — — 0.05 — 0.037 ...
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... Fine Pitch BGA Rev: 1.04a 10/2002 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 0.10 ± 8.00 5.25 13/15 GS71116ATP/J/U 0.10 © 2001, Giga Semiconductor, Inc. ...
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... GS71116ATP-7 400 mil TSOP-II GS71116ATP-8 400 mil TSOP-II GS71116ATP-10 400 mil TSOP-II GS71116ATP-12 400 mil TSOP-II GS71116ATP-7I 400 mil TSOP-II GS71116ATP-8I 400 mil TSOP-II GS71116ATP-10I 400 mil TSOP-II GS71116ATP-12I 400 mil TSOP-II GS71116AJ-7 400 mil SOJ GS71116AJ-8 400 mil SOJ GS71116AJ-10 ...
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... Updated Recommended Operating Conditions table on page 4 Content • Changed FPBGA package from (package U) • Updated Read Cycle AC Characteristics table • Removed 6 ns speed bin from entire document Content • Added 7 ns speed bin to entire document 15/15 GS71116ATP/J/U © 2001, Giga Semiconductor, Inc. ...