ATmega325A Atmel Corporation, ATmega325A Datasheet - Page 265

no-image

ATmega325A

Manufacturer Part Number
ATmega325A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega325A

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATmega325A-AN
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega325A-ANR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega325A-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATmega325A-AUR
Manufacturer:
Atmel
Quantity:
10 000
25.8
25.8.1
25.8.2
8285D–AVR–06/11
Boundary-scan Related Register in I/O Memory
MCUCR – MCU Control Register
MCUSR – MCU Status Register
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
The MCU Control Register contains control bits for general MCU functions.
• Bit 7 – JTD: JTAG Interface Disable
When this bit is zero, the JTAG interface is enabled if the JTAGEN Fuse is programmed. If this
bit is one, the JTAG interface is disabled. In order to avoid unintentional disabling or enabling of
the JTAG interface, a timed sequence must be followed when changing this bit: The application
software must write this bit to the desired value twice within four cycles to change its value. Note
that this bit must not be altered when using the On-chip Debug system.
If the JTAG interface is left unconnected to other JTAG circuitry, the JTD bit should be set to
one. The reason for this is to avoid static current at the TDO pin in the JTAG interface.
The MCU Status Register provides information on which reset source caused an MCU reset.
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by
the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic
zero to the flag.
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x34 (0x54)
Read/Write
Initial Value
R/W
JTD
R
7
0
7
0
R
R
6
0
6
0
-
R
R
5
0
5
0
-
JTRF
PUD
R/W
R/W
4
0
4
WDRF
R/W
R
3
0
3
See Bit Description
BORF
R/W
R
2
0
2
EXTRF
IVSEL
R/W
R/W
1
0
1
PORF
IVCE
R/W
R/W
0
0
0
MCUCR
MCUSR
265

Related parts for ATmega325A