STM6520 STMicroelectronics, STM6520 Datasheet - Page 5

• Manufacturer Part Number: STM6520
• Description: Push-button controlled smart reset
• Manufacturer: STMicroelectronics

Specifications of STM6520

• Dual Smart Reset™ Push-button Inputs, With User-selectable Extended Reset Setup Delay (by Two-state Input Logic): tSRC = 6, 10 s (min.)
• Operating Temperature: –30 °C to +85 °C
• Tdfn8 Package: 2 mm x 2 mm x 0.75 mm

STM6520
1
Description
The Smart Reset™ devices provide a useful feature that ensures inadvertent short reset
push-button closures do not cause system resets. This is done by implementing extended
Smart Reset™ input delay time (t
ensures a safe reset and eliminates the need for a specific dedicated reset button.
This reset configuration provides versatility and allows the application to discriminate
between a software generated interrupt and a hard system reset. When the input push-
buttons are connected to microcontroller interrupt inputs, and are closed for a short time, the
processor can only be interrupted. If the system still does not respond properly, continuing
to keep the push-buttons closed for the extended setup time t
processor through the reset outputs.
The STM6520 has two combined delayed Smart Reset™ inputs (SR0, SR1) with two user-
selectable delayed Smart Reset™ setup time (t
selected by a dual-state Smart Reset™ DSR input pin. When DSR is connected to ground,
t
going active simultaneously after both of the Smart Reset™ inputs were held active for the
selected t
inactive logic level (for this device the output reset pulse duration is fully push-button
controlled, meaning neither fixed nor minimum reset pulse width, nor power-on reset pulse
is implemented). The first reset output, RST1, is active-low, open-drain; the second reset
output, RST2, is active-high, push-pull. The device fully operates over a broad V
1.65 to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the
deasserted reset output levels are then valid down to 1.0 V.
Figure 1.
Figure 2.
SRC
= 7.5 s, when connected to V
SRC
Logic diagram
Pin connections
delay time. The outputs remain asserted until either or both inputs go to
Doc ID 15953 Rev 6
RST1
RST2
DSR
SRC
SR0
SR1
V SS
SR1
CC
, t
) and combined push-button inputs, which together
SRC
1
2
3
4
STM6520
STM6520
= 12.5 s (typ.). There are two reset outputs, both
V CC
V SS
SRC
8
7
6
5
) options of 7.5 s and 12.5 s typ.,
V CC
SR0
NC
RST1
RST2
DSR
SRC
causes a hard reset of the
Description
CC
range
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