s19250 Applied Micro Circuits Corporation (AMCC), s19250 Datasheet

s19250

Manufacturer Part Number

s19250

Description

Sts-192 Sonet/sdh/fec/gbe/fc 16-bit Transceiver With Edc

Manufacturer

Applied Micro Circuits Corporation (AMCC)

Datasheet

1.S19250.pdf (2 pages)

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S19250

STS-192 SONET/SDH/FEC/GbE/FC 16-bit Transceiver with EDC

Features

• Operational from 9.9 Gbps to 11.3 Gbps

• Built-In Self Test (BIST) with Error Counter

• On-chip High-Frequency PLLs for Clock Recov-

• 16-bit LVDS Parallel Data Path

• TX and RX Lock Detect Indicators

• Reference Loop Timing Modes

• Line and Diagnostic Loopback Mode for Faulty

• -40°C to 85°C Industrial Temperature Range

• Supports MDIO, I2C and SPI serial interface

• Complies with applicable OIF SFI-4 Phase 1,

• 2000 V ESD rating on low speed pins, 1000 V

• 17 x 17 mm

• 1.1 W typical

Transmitter Features

• Ref. Freq. of 155.52 or 622.08 MHz (or eq. FEC

• Internal, Self-Initializing FIFO to Decouple

• Programmable TSD Output Differential Swing

• Duo Binary Encoding

Receiver Features

• LOS/RSSI

• ISI compensation. Tolerates additional 350 ps/

• Tolerates up to 36” of Standard FR-4 Material

• Adaptive Post-Amplifier Offset Adjust

• Phase Adjust of -0.11 to +0.085 UI

• Ref. Freq. of 155.52 MHz or 622.08 MHz (or eq.

• Capability to Interface with Single-Ended or

• Input Sensitivity of 10 mV p-p (one wire or

Applications

• SONET/SDH and 10GbE-Based Transmission

• Section Repeaters

• Add Drop Multiplexers (ADM)

• Broad-Band Cross-Connects

• Fiber Optic Test Equipment

ery and Clock Gen.

Node Identification

Telcordia/ITU-T, 300-pin MSA, IEEE 802.3ae

and XFP MSA Standards

on high speed I/Os

Green / RoHS compliant lead free option. Pin

Compatible with S19235/S19237.

rate); Common 10 GbE/10 G FC Ref. of 156.25

MHz or 159.375 MHz for 10 G FC; Divide by 16

or 64 of the TX rates

Transmit Clocks

nm of chromatic dispersion with an OSNR

penalty of 1.0dB over a traditional demux

FEC rate); Common ref. of 156.25 MHz for 10

GbE/10 GFC or 159.375 MHz for 10 GFC; Divide

by 16 or 64 of the RX rates

Differential TIAs (Center Tap Option)

two wire) at 10

Systems & Modules

, 1.0 mm pitch package with

-12

BER

Description

The S19250 MUX/DeMux chip is a fully

integrated serialization/de-serialization SONET

STS-192/10 GB Ethernet/Fiber Channel

transceiver with Electronic Dispersion

Compensation (EDC). This device can be used

to compensate channel impairments caused by

Single Mode Fiber (SMF) and copper medium.

The chip performs all necessary parallel-to-serial

and serial-to-parallel functions in conformance

with SONET/SDH, 10 Gigabit Ethernet (10 GbE)

and 10 Gigabit Fibre Channel (10 G FC)

transmission standards. The figure below shows

a typical network application. The other

application block diagrams are shown on

page 2.

On-chip clock synthesis PLL components are

contained in the S19250 chip, allowing the use

of a slower external transmit clock reference.

The chip can be used with 155.52 MHz or

622.08 MHz (or equivalent FEC/10 GbE/10 G FC

rates) reference clocks, in support of existing

system clocking schemes. The low-jitter LVDS

interface guarantees compliance with the bit-

error rate requirements of the Telcordia and ITU-

T standards.

Overview

The S19250 transceiver incorporates SONET/

SDH/10 GbE/10 G Fibre Channel serialization

and deserialization functions. This chip can be

used to implement the front end of SONET/10

GbE/10 G Fibre Channel equipment, which

consists primarily of the serial transmit interface

KHATANGA,

or RUBICON

MEKONG,

GANGES,

HUDSON,

AMCC'S

S19250

AMCC

System Block Diagram with the S19250

Driver

Laser

TIA

OTX

ORX

and the serial receive interface. The chip

includes parallel-to-serial, and serial-to-parallel

conversion and system timing. The S19250 is

designed to be pin compatible with the

S19235/S19237. Therefore, the default serial bus

is MDIO.

AMCC Suggested Interface Devices

GANGES II

(S19202CBI20)

HUDSON (S19203)

RUBICON (S19227)

MEKONG (S19204)

KHATANGA

(S19205)

ORX

OTX

PRODUC T BRIEF

Driver

Laser

TIA

STS-192 POS/ATM SONET/SDH Mapper

Variable Rate Digital Wrapper Framer/

Deframer, Performance

Monitor, and FEC Device

ASYNC Mapper Device with Strong FEC

STS-192 Pointer Processor

STS-192c SONET/SDH Framer/Mapper

with Integrated MAC

OC-192/48/12/3 DW/FEC/PM and

S19250

AMCC

KHATANGA,

or RUBICON

HUDSON,

MEKONG,

GANGES,

AMCC'S

Related parts for s19250

s19250 Summary of contents

Page 1

... Transmitter Features On-chip clock synthesis PLL components are • Ref. Freq. of 155.52 or 622.08 MHz (or eq. FEC contained in the S19250 chip, allowing the use rate); Common 10 GbE/ Ref. of 156. slower external transmit clock reference. MHz or 159.375 MHz for 10 G FC; Divide by 16 The chip can be used with 155 ...

Page 2

... Enable Adaptive ISI Mitigation Figure 1. Mid-Plane Application Block Diagram Enable Adaptive Post-Amplifier Offset Control Enable Adaptive ISI Mitigation Disable EDC MDIO 16 OR AMCC XFP MODULE S19250 OR 16 Compensates up to 24" of FR-4 Figure 2. XFP Application Block Diagram SPECIFIC AT IONS ASIC ...

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