CDB5529 Cirrus Logic Inc, CDB5529 Datasheet
CDB5529
Specifications of CDB5529
Related parts for CDB5529
CDB5529 Summary of contents
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Programmable ∆Σ ADC with 6-bit Latch Features Delta-sigma Analog-to-digital Converter - Linearity Error: 0.0015%FS - Noise-free Resolution: 16-Bits 2.5 V Bipolar/Unipolar Buffered Input Range 6-bit Output Latch Eight Digital Filters - Selectable Output Word Rates - Output Settles in ...
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TABLE OF CONTENTS CHARACTERISTICS & SPECIFICATIONS ........................................................ 4 ANALOG CHARACTERISTICS................................................................... 4 ANALOG CHARACTERISTICS................................................................... 5 5V DIGITAL CHARACTERISTICS .............................................................. DIGITAL CHARACTERISTICS ............................................................. 6 DYNAMIC CHARACTERISTICS ................................................................. 6 ABSOLUTE MAXIMUM RATINGS .............................................................. 7 SWITCHING CHARACTERISTICS ............................................................. 8 GENERAL DESCRIPTION ...
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LIST OF FIGURES Input models for AIN+ and AIN- pins......................................................... 11 Input model for VREF+ and VREF- pins. .................................................. 11 CS5529 Register Diagram. ....................................................................... 11 Command and Data Word Timing. ............................................................ 14 Filter Response (Normalized to Output Word Rate = ...
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CHARACTERISTICS & SPECIFICATIONS ANALOG CHARACTERISTICS VREF 32.768 kHz, OWR (Output Word Rate Sps, Bipolar Mode, Input Range = ±2.5 V.) CLK (See Notes 1 and 2.) Parameter Accuracy Linearity Error No Missing Codes ...
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ANALOG CHARACTERISTICS Parameter Analog Input Common Mode + Signal on AIN+ or AIN- Single Supply Dual Supply Common Mode Rejection dc 50, 60Hz Input Capacitance CVF Current AIN+, AIN- System Calibration Specifications Full Scale Calibration Range, with VREF = 2.5 ...
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DIGITAL CHARACTERISTICS 11.) Parameter High-level Input Voltage: All Pins Except Low-level Input Voltage: All Pins Except High-level Output Voltage: All Pins Except Low-level Output Voltage: All Pins Except Input Leakage Current 3-state Leakage Current Digital Output Pin Capacitance Notes: ...
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ABSOLUTE MAXIMUM RATINGS Parameter DC Power Supplies Input Current, Any Pin Except Supplies Output Current Power Dissipation Analog Input Voltage Digital Input Voltage Ambient Operating Temperature Storage Temperature Notes: 13. All voltages with respect to ground. 14. VA+ and VA- ...
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SWITCHING CHARACTERISTICS Input Levels: Logic Logic 1 = VD+; C Parameter Master Clock Frequency: External Clock or Internal Oscillator Master Clock Duty Cycle Rise Times Fall Times Start-up Oscillator Start-up Time Power-on Reset Period Serial Port ...
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CS t3 SCLK Continuous Running SCLK Timing (Not to Scale ...
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GENERAL DESCRIPTION The CS5529 is a 16-bit ∆Σ Analog-to-Digital Con- verter (ADC) which includes coarse/fine charge buffers, a fourth order ∆Σ modulator, a calibration microcontroller, eight digital filters which provide selectable decimation rates, a 6-bit output latch, and a three-wire ...
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Fine 1 φ Coarse 1 AIN C = 20pF V ≤ 25mV 32.768 kHz Figure 1. Input models for AIN+ and AIN- pins. ages. The differential voltage between VREF+ and ...
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Command Register Descriptions D7(MSB BIT NAME D7 Command Bit Single Conversion Continuous Conversions Read/Write, R/W D3-D1 Register Select Bit, RSB2- RSB0 D0 Power Save/Run, PS/R Perform Single Conversion 7 ...
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SYNC1 Part of the serial port re-initialization sequence (see text for use of command). SYNC0 End of the serial port re-initialization sequence. Read/Write Registers These commands are used ...
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...
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Serial Port Initialization The serial port is initialized to the command mode whenever a power-on reset is performed or when the port initialization sequence is completed. The port initialization sequence involves clocking fif- teen (or more) SYNC1 command bytes (0xFF) ...
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This allows the converter to quickly return to the normal or low power mode once the PS/R bit is set back to a logic the configuration register is logic 1 and Power Save command is ...
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Port Flag The port flag bit in the configuration register allows the user to select the mode in which conversions will be presented to the serial port. With the port flag bit cleared, the user must read the conversion data ...
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Gain Register 23(MSB -11 -12 -13 - The gain register span is from ...
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External Connections AIN+ Full Scale + - AIN- Figure 9. System Calibration of Gain. tions system gain calibration is performed, the calibrated input must not cause the resulting gain register’s content, decoded in decimal, to exceed 3.9999998. The ...
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Configuration Register Descriptions D23(MSB) D22 D21 D20 D11 D10 BIT NAME D23-D22 Latch Outputs, A1-A0 D21-D18 Latch Outputs, D3-D0 D17 Not Used, NU D16 Low Power Mode, LPM D15-D13 Word ...
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Performing Conversions The CS5529 offers two modes of performing con- versions: single conversion and continuous conver- sions. The sections that follow detail the differences and provides examples illustrating how to use the modes. Note that it is assumed that the ...
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SDO flag falls. For instance, the user can just read the conversion data register again to exit the contin- uous conversion mode. Note the user begins to clear the SDO flag and read the conversion data, this action ...
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Power Supply Arrangements The CS5529 is designed to operate from single or dual analog supplies and a single digital supply. The following power supply connections are possi- ble ...
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digital supply to measure ground referenced bipolar signals. Fig- ure 12 illustrates the CS5529 connected with ±3.0 +3.0 V Analog Supply ±3.0 V Differential Inputs (Gain Register = 1.0) ±1.50 V ...
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Getting Started The CS5529 has many features. From a software programmer’s perspective, what should be done first? To begin, a 32.768 kHz crystal takes approx- imately 500 ms to start-up. To accommodate for this recommended that a software ...
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PIN DESCRIPTIONS NEGATIVE ANALOG POWER POSITIVE ANALOG POWER DIFFERENTIAL ANALOG INPUT DIFFERENTIAL ANALOG INPUT LOGIC OUTPUT (ANALOG) LOGIC OUTPUT (ANALOG) LOGIC OUTPUT (DIGITAL) CHIP SELECT SERIAL CLOCK INPUT CRYSTAL OUT Clock Generator XIN; XOUT - Crystal In; Crystal Out, Pins ...
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A0 Logic Outputs (Analog), Pin 5, 6. The logic states of A0-A1 mimic the states of the D22-D23 bits of the configuration register. Logic Output 0 = VA-, and Logic Output 1 = VA+. D0, D1, D2, D3 ...
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SPECIFICATION DEFINITIONS Linearity Error The deviation of a code from a straight line which connects the two end points of the A/D Converter transfer function. One end point is located 1/2 LSB below the first code transition and the other ...
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ORDERING INFORMATION Model Number Linearity Error (Max) ±0.003% CS5529-AP ±0.003% CS5529-AS ±0.003% CS5529-ASZ ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model CS5529-AP CS5529-AS CS5529-ASZ (Lead Free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS246F5 Temperature Range -40°C to +85°C ...
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PACKAGE DIMENSIONS 20 PIN PLASTIC (PDIP) PACKAGE DRAWING E1 1 TOP VIEW DIM ∝ SEATING PLANE BOTTOM VIEW ...
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SSOP PACKAGE DRAWING TOP VIEW DIM ∝ Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do ...