SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 87

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

3.6
3.6.1
ARM DDI 0029G
Data timed signals
D[31:0], DOUT[31:0], and DIN[31:0]
This section describes:
•
•
•
•
The ARM7TDMI processor provides both unidirectional data buses, DIN[31:0],
DOUT[31:0], and a bidirectional data bus, D[31:0]. The configuration input BUSEN is
used to select which is active. Figure 3-11 shows the arrangement of the data buses and
bus-splitter logic.
When the bidirectional data bus is being used then you must disable the unidirectional
buses by driving BUSEN LOW. The timing of the bus for three cycles, load-store-load,
is shown in Figure 3-12 on page 3-18.
D[31:0], DOUT[31:0], and DIN[31:0] on page 3-17
ABORT on page 3-24
Byte latch enables on page 3-24
Byte and halfword accesses on page 3-26.
Copyright © 1994-2001. All rights reserved.
ARM7TDMI
Latch control
EmbeddICE
Buffer control
Logic
Figure 3-11 External bus arrangement
Latch
G
Memory Interface
DIN[31:0]
DOUT[31:0]
D[31:0]
3-17