CY7C419 CYPRESS [Cypress Semiconductor], CY7C419 Datasheet

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... FIFOs to retransmit the data. Read enable (R) and write enable (W) must both be HIGH during retransmit, and then R is used to access the data. The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425, CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated using an advanced 0.65-micron P-well CMOS technology. In- put ESD protection is greater than 2000V and latch-up is pre- vented by careful layout and guard rings ...

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... DC Voltage Applied to Outputs in High Z State................................................–0.5V to +7.0V DC Input Voltage ............................................–0.5V to +7.0V Power Dissipation.......................................................... 1.0W Output Current, into Outputs (LOW)............................ 20 mA Static Discharge Voltage ........................................... >2000V (per MIL–STD–883, Method 3015) Latch-Up Current..................................................... >200 mA CY7C419/21/25/29/33 PLCC/LCC Top View Top View 323130 ...

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... OUT MHz All Inputs = Com’ Min. IH Mil/Ind Com’l V –0.2V CC Mil/Ind CY7C419/21/25/29/33 7C419–10, 15, 30, 40 7C420/1–10, 15, 20, 25, 30, 40, 65 7C424/5–10, 15, 20, 25, 30, 40, 65 7C428/9–10, 15, 20, 25, 30, 40, 65 7C432/3–10, 15, 20, 25, 30, 40, 65 Min. Max. 2.4 0.4 2 2.2 ...

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... 4. 500 333 INCLUDING JIGAND C420–7 SCOPE (b) 2V CY7C419/21/25/29/33 7C419–40 7C420–40 7C420–65 7C421–40 7C421–65 7C424–40 7C424–65 7C425–40 7C425–65 7C428–65 7C429–40 7C429–65 7C432–40 7C433–40 7C433– ...

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... transition is measured at the 1.5V level DVR CY7C419/21/25/29/33 7C420–20 7C420–25 7C421–20 7C421–25 7C424–20 7C424–25 7C425–20 7C425–25 7C428–20 7C429–20 7C429–25 7C432–25 7C433–20 7C433– ...

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... Effective Write Pulse Width After FF HIGH WPF t Expansion Out LOW Delay from Clock XOL t Expansion Out HIGH Delay from Clock XOH Document #: 38-06001 Rev. *A CY7C419/21/25/29/33 [7, 8] (continued) 7C419–10 7C419–15 7C420–20 7C421–10 7C421–15 7C421–20 7C424–20 7C425– ...

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... Effective Write Pulse Width After FF HIGH WPF t Expansion Out LOW Delay from Clock XOL t Expansion Out HIGH Delay from Clock XOH Document #: 38-06001 Rev. *A CY7C419/21/25/29/33 [7, 8] (continued) 7C419–30 7C419–40 7C420–40 7C421–30 7C421–40 7C424–30 7C424–40 7C425– ...

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... DVR DATA VALID DATA VALID [12] t MRSC t PMR t t WPW t EFL t HFH t FFH HALF FULL+1 t WHF CY7C419/21/25/29/33 t HZR DATA VALID DATA VALID RPW t RMR HALF FULL t RHF C420–9 C420–10 C420–11 Page ...

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... EF, HF and FF may change state during retransmit as a result of the offset of the read and write pointers, but flags will be valid RTC PRT RTR Document #: 38-06001 Rev. *A ADDITIONAL FIRST READ READS t RFF ADDITIONAL FIRST WRITE WRITES t WEF [14] t RTC t PRT t RTR CY7C419/21/25/29/33 FIRST WRITE C420–12 FIRST READ VALID C420–13 C420–14 . RTC Page ...

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... Full Flag and Write Data Flow-Through Mode DATA DATA OUT Document #: 38-06001 Rev RAE t RPE t REF t WEF HWZ DATA VALID t t WAF WPF t t RFF WFF DATA VALID t SD DATA VALID CY7C419/21/25/29/33 C420– C420–16 Page ...

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... Empty flag (EF) being LOW, and both the Half Full (HF) and Full flags (FF) being HIGH. Read (R) and write (W) must be HIGH t edge of MR for a valid reset cycle. If reading from the FIFO after a reset cycle is attempted, the outputs will all be in the high-impedance state. CY7C419/21/25/29/ DATA VALID ...

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... FIFO, and asynchronously performing a read. The empty and full flags are used to avoid these effective pulse width viola- tions, but in order to do this and operate at the maximum fre- quency, the flag must be valid at the beginning of the next cycle. . FIFOs can CC CY7C419/21/25/29/33 Page ...

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... FULL MR Document #: 38-06001 Rev CY7C419 9 CY7C420/1 CY7C424/5 CY7C428/9 CY7C432 CY7C419 9 CY7C420/1 CY7C424/5 CY7C428/9 CY7C432 CY7C419 9 CY7C420/1 CY7C424/5 CY7C428/9 CY7C432 FIRST DEVICE Figure 1. Depth Expansion CY7C419/21/25/29/ EMPTY C420–19 Page ...

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... Ordering Information Speed (ns) Ordering Code 10 CY7C419–10AC CY7C419–10JC CY7C419–10PC CY7C419–10VC 15 CY7C419–15AC CY7C419–15JC CY7C419–15VC CY7C419–15JI 30 CY7C419–30JC 40 CY7C419–40AC CY7C419–40JC Ordering Information (continued) Speed (ns) Ordering Code 25 CY7C420–25PC 40 CY7C420–40PC 65 CY7C420–65PC Ordering Information ...

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... CerDIP L55 32-Pin Rectangular Leadless Chip Carrier J65 32-Lead Plastic Leaded Chip Carrier P21 28-Lead (300-Mil) Molded DIP V21 28-Lead (300-Mil) Molded SOJ V21 28-Lead (300-Mil) Molded SOJ CY7C419/21/25/29/33 Operating Range Industrial Military Commercial Industrial Commercial Industrial Military Operating ...

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... Thin Plastic Quad Flatpack J65 32-Lead Plastic Leaded Chip Carrier P21 28-Lead (300-Mil) Molded DIP J65 32-Lead Plastic Leaded Chip Carrier P21 28-Lead (300-Mil) Molded DIP J65 32-Lead Plastic Leaded Chip Carrier CY7C419/21/25/29/33 Operating Range Commercial Industrial Commercial Operating Range Commercial Military Commercial ...

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... Plastic Leaded Chip Carrier P21 28-Lead (300-Mil) Molded DIP V21 28-Lead (300-Mil) Molded SOJ J65 32-Lead Plastic Leaded Chip Carrier J65 32-Lead Plastic Leaded Chip Carrier P21 28-Lead (300-Mil) Molded DIP CY7C419/21/25/29/33 Operating Range Commercial Commercial Operating Range Commercial Commercial Industrial Military ...

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... CC1 SB1 SB2 Document #: 38-06001 Rev. *A CY7C419/21/25/29/33 Switching Characteristics Parameters Subgroups 10, 11 DVR t 9, 10, 11 ...

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... Package Diagrams 28-Lead (600-Mil) CerDIP D16 MIL-STD-1835 D- 10Config.A Document #: 38-06001 Rev. *A 32-Lead Thin Plastic Quad Flat Pack A32 CY7C419/21/25/29/33 28-Lead (300-Mil) CerDIP D22 MIL-STD-1835 D- 15 Config.A Page ...

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... Package Diagrams (continued) 32-Lead Plastic Leaded Chip Carrier J65 Document #: 38-06001 Rev. *A 32-Pin Rectangular Leadless Chip Carrier L55 MIL-STD-1835 C-12 28-Lead (600-Mil) Molded DIP P15 CY7C419/21/25/29/33 Page ...

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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Molded DIP P21 28-Lead (300-Mil) Molded SOJ V21 CY7C419/21/25/29/33 Page ...

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... Document Title: CY7C419, CY7C421, CY7C425, CY7C429, CY7C433 256/512/1K/2K/4Kx9 Asynchronous FIFO Document Number: 38-06001 Issue REV. ECN NO. Date ** 106462 07/11/01 *A 122332 12/30/02 Document #: 38-06001 Rev. *A Orig. of Change Description of Change SZV Change from Spec Number: 38-00079 to 38-06001 RBI Added power up requirements to maximum ratings information. ...