ADA4000-1ARZ Analog Devices Inc, ADA4000-1ARZ Datasheet - Page 11

• Manufacturer Part Number: ADA4000-1ARZ
• Description: IC OPAMP JFET 5MHZ PREC LP 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of ADA4000-1ARZ

• Slew Rate: 20 V/µs
• Design Resources: Power off protected data acquisition signal chain using ADG4612 , AD711, and AD7476 (CN0165)
• Amplifier Type: J-FET
• Number Of Circuits: 1
• Gain Bandwidth Product: 5MHz
• Current - Input Bias: 5pA
• Voltage - Input Offset: 200µV
• Current - Supply: 1.35mA
• Current - Output / Channel: 28mA
• Voltage - Supply, Single/dual (±): 8 V ~ 36 V, ±4 V ~ 18 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Op Amp Type: Low Power
• No. Of Amplifiers: 1
• Bandwidth: 5MHz
• Supply Voltage Range: ± 4V To ± 18V
• Amplifier Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Output Type: -
• -3db Bandwidth: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SETTLING TIME
Settling time is the amount of time it takes the amplifier output
to reach and remain within a percentage of its final value. This
is an important parameter in data acquisition systems. Because
most bipolar DAC converters have current output, an external
op amp is required to convert the current to voltage. Therefore,
the amplifier settling time plays a role in the total settling time
of the output signal. A good approximation for the total settling
time is
The ADA4000-1/ADA4000-2/ADA4000-4 settle to within 0.1%
of their final value in less than 1.2 μs. The settling time has been
tested by using the configuration circuit in Figure 34.
t
S
Total
=
(
t
S
DAC
10V p-p
) (
2
+
t
S
AMP
V1
)
10kΩ
2
0
3
2
ADA4000-1
+15V
–15V
10kΩ
V+
V–
Figure 34. Settling Time Test Circuit
Rev. A | Page 11 of 16
1
10kΩ
10kΩ
The input signal is a 10 V pulse and the output is the error
signal for the settling time shown in Figure 33.
Figure 33. Settling Time Measurement Using the False Summing Node Method
1kΩ
ADA4000-1/ADA4000-2/ADA4000-4
AD828
+15V
–15V
V+
V–
8
4
20kΩ
200ns/DIV
V
OUT
200mV/DIV
5V/DIV