LRS1331C Sharp Electronics, LRS1331C Datasheet - Page 7

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LRS1331C

Manufacturer Part Number
LRS1331C
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LRS1331C

Lead Free Status / Rohs Status
Not Compliant
3. Truth Table
Notes:
1. L = V
2. Command Writes involving block erase, full chip erase, word write, or lock-bit configuration are reliably
3. Never hold F-OE low and F-WE low at the same timing.
4. Refer Section 5. Command Definitions for Flash Memory valid D
5. F-WP set to V
Read
Output
Disable
Write
Standby
Reset Power
Down
Standby
Reset Power
Down
executed when F-V
Block erase, full chip erase, word write, or lock-bit configuration with F-V
spurious results and should not be attempted.
Flash
IL
, H = V
S-CE
Standby
Read
Output
Disable
Write
Read
Output
Disable
Write
Standby
(1)
H
X
X
6. SRAM Standby Mode
SRAM
IL or
1
IH
, X = H or L, High-Z = High impedance. Refer to DC Characteristics.
S-CE
V
CCW
X
X
IH
L
2,3,4,5
.
Notes F-CE F-RP F-OE F-WE S-CE
2
3,5
= V
5
5
5
5
5
5
5
5
5
S-LB
CCWH
X
X
H
H
X
H
X
L
and F-V
S-UB
X
X
H
H
H
H
L
L
CC
= 2.7V to 3.3V.
H
X
X
X
L
L R S 1 3 3 1 C
H
X
X
X
L
L
L
S-LB
IN
H
L
L
1
(6)
(6)
during a write operation.
S-CE
H
H
7. S-UB, S-LB Control Mode
S-UB
CCW
H
2
L
L
S-OE S-WE S-LB S-UB DQ
X
H
X
X
H
X
X
X
< V
L
L
DQ
D
D
CCWH
High-Z
OUT
OUT
0
to DQ
X
H
H
X
H
H
X
X
L
L
/D
/D
(Min.) produce
IN
IN
7
X
H
X
H
DQ
D
D
(6)
(6)
High-Z
OUT
OUT
8
to DQ
X
H
X
H
/D
/D
(7)
(7)
(7)
(7)
IN
IN
15
High-Z
High-Z
High-Z
High-Z
0
D
D
to DQ
OUT
IN
Rev. 1.00
15
5

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