PIC18LF452 Microchip Technology, PIC18LF452 Datasheet - Page 23
PIC18LF452
Manufacturer Part Number
PIC18LF452
Description
(PIC18LFxx2) Enhanced FLASH Microcontrollers
Manufacturer
Microchip Technology
Datasheet
1.PIC18LF452.pdf
(332 pages)
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2.6.1
The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON<0>) controls the clock switching. When the
SCS bit is ’0’, the system clock source comes from the
main oscillator that is selected by the FOSC configura-
tion bits in Configuration Register1H. When the SCS bit
is set, the system clock source will come from the
Timer1 oscillator. The SCS bit is cleared on all forms of
RESET.
REGISTER 2-1:
2002 Microchip Technology Inc.
SYSTEM CLOCK SWITCH BIT
bit 7-1
bit 0
OSCCON REGISTER
bit 7
Unimplemented: Read as '0'
SCS: System Clock Switch bit
When OSCSEN configuration bit = ’0’ and T1OSCEN bit is set:
1 = Switch to Timer1 oscillator/clock pin
0 = Use primary oscillator/clock input pin
When OSCSEN and T1OSCEN are in other states:
bit is forced clear
Legend:
R = Readable bit
- n = Value at POR
U-0
—
U-0
—
U-0
W = Writable bit
’1’ = Bit is set
—
U-0
—
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
The Timer1 oscillator must be enabled and
operating to switch the system clock
source. The Timer1 oscillator is enabled by
setting the T1OSCEN bit in the Timer1
control register (T1CON). If the Timer1
oscillator is not enabled, then any write to
the SCS bit will be ignored (SCS bit forced
cleared) and the main oscillator will
continue to be the system clock source.
U-0
—
U-0
—
PIC18FXX2
x = Bit is unknown
U-0
—
DS39564B-page 21
R/W-1
SCS
bit 0