ST7FLIT15BY1M6 STMicroelectronics, ST7FLIT15BY1M6 Datasheet - Page 141

IC MCU 8BIT 4K FLASH 16-SOIC

ST7FLIT15BY1M6

Manufacturer Part Number
ST7FLIT15BY1M6
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLIT15BY1M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Controller Family/series
ST7
No. Of I/o's
13
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
5
Rohs Compliant
Yes
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-8245-5
ST7FLIT15BY1M6

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0
ADC CHARACTERISTICS (Cont’d)
Figure 112. ADC Accuracy Characteristics with amplifier enabled
Note:
1. When the AMPSEL bit in the ADCDRL register is set, it is mandatory that f
f
CPU
Vmax
704
108
Vmin
Vout (ADC input)
=8MHz. then SPEED=0, SLOW=1).
0
V
SS
Digital Result ADCDR
62.5mV
1LSB
1
0V
E
O
2
IDEAL
3
Noise
=
V
------------------------------- -
4
DD
430mV
1024
5
1 LSB
V
SS
E
6
T
IDEAL
E
(OPAMP input)
7
L
Vin
(2)
E
D
701 702 703 704
(3)
(1)
E
G
430mV
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Differential Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
V
V
in
in
(OPAMP)
(LSB
ADC
IDEAL
be less than or equal to 2 MHz. (if
)
ST7LITE1xB
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