EP2S130F1020C3 Altera, EP2S130F1020C3 Datasheet - Page 127

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EP2S130F1020C3

Manufacturer Part Number
EP2S130F1020C3
Description
IC STRATIX II FPGA 130K 1020FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S130F1020C3

Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
742
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
132540
# I/os (max)
742
Frequency (max)
778.82MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
132540
Ram Bits
6747840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2158

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0
Figure 3–2. Temperature vs. Temperature-Sensing Diode Voltage
Automated
Single Event
Upset (SEU)
Detection
Altera Corporation
May 2007
(Across Diode)
Voltage
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
–55
The temperature-sensing diode works for the entire operating range, as
shown in
The temperature sensing diode is a very sensitive circuit which can be
influenced by noise coupled from other traces on the board, and possibly
within the device package itself, depending on device usage. The
interfacing device registers temperature based on milivolts of difference
as seen at the TSD. Switching I/O near the TSD pins can affect the
temperature reading. Altera recommends you take temperature readings
during periods of no activity in the device (for example, standby mode
where no clocks are toggling in the device), such as when the nearby I/Os
are at a DC state, and disable clock networks in the device.
Stratix II devices offer on-chip circuitry for automated checking of single
event upset (SEU) detection. Some applications that require the device to
operate error free at high elevations or in close proximity to Earth’s North
or South Pole require periodic checks to ensure continued data integrity.
The error detection cyclic redundancy check (CRC) feature controlled by
–30
Figure
3–2.
–5
Temperature (˚C)
20
45
Stratix II Device Handbook, Volume 1
70
100 μA Bias Current
10 μA Bias Current
Configuration & Testing
95
120
3–13

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