MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 472

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MC68030FE25C

Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68030FE25C

Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
~ N S T R U O T ~ O N
MOTOROLA
CONTROLLER
S E Q U E N C E R
EXECUTI O N
ACTIVITY
COUNT
TIME
BUS
BUS
CLK
CLK
tion stream. It shows the activity of the external bus, the bus controller, and
the sequencer.
The effect of instruction alignment on timing is illustrated b y t h e following
example. The assumptions referred to in 11.6 INSTRUCTION TIMING TABLES
apply. Both the data cache and instruction cache miss on all accesses.
The instruction stream is positioned with even alignment in 32-bit memory
as:
Figure 11-4 shows processor activity for even alignment of the given instruc-
Address
~
1
2
CALCULATE AND FETCH
13
n+8
n+12
n+4
Figure 11-4. Processor Activity - - Even A l i g n m e n t
S O U R C E EA
FOR MOVE
3
MovEi d B An Dn Dn
4
8
2.
1.
MC68030 USER'S MANUAL
LEGEND:
5
MOVE.L (d16,An,Dn),Dn
MOVE.L
CMPI.W
#(data.W)
#(data)'W,(d16,An)
;
MOVE
6
d16
M O V E
Instruction
7
~ I
(d16,An,Dn),Dn
#(data/.W,(d16,An)
8
~
CALCULATE AND FETCH
IDLE
10
EA Ext
CMPI
SOURCE EA
FOR CMPI
d 16
9
I READ FROM
I
11
CMPI.W #(data).W,(d16,An)
(d]6,An)
12
8
13
PREFETCH
n + 16
IDLE
14
15
PERFORM
CMPI
IDLE
16
11-9
11

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