EZ80190AZ050EG Zilog, EZ80190AZ050EG Datasheet - Page 11

• Manufacturer Part Number: EZ80190AZ050EG
• Description: IC WEBSERVER 50MHZ XTEMP 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050EG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80190x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3865; EZ80190AZ050EG

Architectural Overview
General Description
Features
PS006614-1208
Zilog’s eZ80190 microprocessor is a high-speed single-cycle instruction-fetch micropro-
cessor with a clock speed of up to 50 MHz. It is the first of a new set of products based
upon Zilog’s eZ80
The eZ80 CPU is one of the fastest 8-bit CPUs available today, executing code up to four
times faster with zero wait-state memory than a standard Z80
quency. This increased processing efficiency can be used to improve available bandwidth
or to decrease power consumption.
Considering both the high clock speed and instruction pipeline efficiency, the eZ80 CPU’s
processing power rivals the performance of 16-bit microprocessors.
The key features of eZ80190 microprocessor are as follows:
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1. For simplicity, the term eZ80 CPU is referred to as CPU for the bulk of this docu-
ment.
Single-cycle instruction fetch, high-performance eZ80 CPU core
16 x 16-bit Multiply and 40-bit Accumulate with 1 KB dual-port SRAM
Four Chip Selects with individual Wait State generators
Six Counter/Timers with prescalers
Watchdog Timer (WDT)
2-channel Direct Memory Access (DMA) controller
8 KB high-speed data SRAM
2 Universal Zilog Interface (UZI) channels (I
Generator
Fixed-priority vectored interrupts (32 external, 11 internal)
32 bits of General-Purpose Input/Output (GPIO)
On-chip oscillator
3.0 V to 3.6 V supply voltage with 5 V tolerant inputs
100-pin LQFP package
®
CPU.
2
C, SPI, UART) with built-in Baud Rate
®
operating at the same fre-
Product Specification
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Architectural Overview
1