EZ80190AZ050EG Zilog, EZ80190AZ050EG Datasheet - Page 183

• Manufacturer Part Number: EZ80190AZ050EG
• Description: IC WEBSERVER 50MHZ XTEMP 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050EG

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Processor Series: EZ80190x
• Core: eZ80
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3865; EZ80190AZ050EG

Table 106. Op Code Map—Second Op Code after 0CBh
PS006614-1208
Legend
of Second
First Operand
Op Code
A RES
B RES
C SET
D SET
E SET
0 RLC
1
2 SLA
3
4
5
6
7
8 RES
9 RES
F SET
Nibble
Upper
Notes:
BIT
0,B
BIT
2,B
BIT
4,B
BIT
6,B
0,B
2,B
4,B
6,B
0,B
2,B
4,B
6,B
RL
0
B
B
B
Lower Nibble of 2nd Op Code
n = 8-bit data; Mmn = 16- or 24-bit addr or data; d = 8-bit two’s-complement displacement.
RES
RES
RES
RES
RLC
SLA
SET
SET
SET
SET
BIT
0,C
BIT
2,C
BIT
4,C
BIT
6,C
0,C
2,C
4,C
6,C
0,C
2,C
4,C
6,C
RL
A
C
C
C
1
RES
4,H
4
RES
RES
RES
RES
RLC
SET
SET
SET
SET
SLA
BIT
0,D
BIT
2,D
BIT
4,D
BIT
6,D
0,D
2,D
4,D
6,D
0,D
2,D
4,D
6,D
RL
2
D
D
D
Second Operand
Mnemonic
RES
RES
RES
RES
RLC
SET
SET
SET
SET
SLA
BIT
BIT
BIT
BIT
0,E
2,E
4,E
6,E
0,E
2,E
4,E
6,E
0,E
2,E
4,E
6,E
RL
E
E
E
3
RLC
RES
RES
RES
RES
SET
SET
SET
SET
SLA
BIT
0,H
BIT
2,H
BIT
4,H
BIT
6,H
0,H
2,H
4,H
6,H
0,H
2,H
4,H
6,H
RL
H
H
H
4
RLC
RES
RES
RES
RES
SLA
SET
SET
SET
SET
BIT
BIT
BIT
BIT
0,L
2,L
4,L
6,L
0,L
2,L
4,L
6,L
0,L
2,L
4,L
6,L
RL
5
L
L
L
0,(HL)
2,(HL)
4,(HL)
6,(HL)
0,(HL)
2,(HL)
4,(HL)
6,(HL)
0,(HL)
2,(HL)
4,(HL)
6,(HL)
RLC
RES
RES
RES
RES
(HL)
(HL)
SLA
(HL)
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RL
6
Lower Nibble (Hex)
RLC
RES
RES
RES
RES
SLA
SET
SET
SET
SET
BIT
0,A
BIT
2,A
BIT
4,A
BIT
6,A
0,A
2,A
4,A
6,A
0,A
2,A
4,A
6,A
RL
7
A
A
A
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,B
BIT
3,B
BIT
5,B
BIT
7,B
1,B
3,B
5,B
7,B
1,B
3,B
5,B
7,B
RR
8
B
B
B
B
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,C
BIT
3,C
BIT
5,C
BIT
7,C
1,C
3,C
5,C
7,C
1,C
3,C
5,C
7,C
RR
9
C
C
C
C
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,D
BIT
3,D
BIT
5,D
BIT
7,D
1,D
3,D
5,D
7,D
1,D
3,D
5,D
7,D
RR
A
D
D
D
D
RRC
SRA
SRL
RES
RES
RES
RES
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RR
1,E
3,E
5,E
7,E
1,E
3,E
5,E
7,E
1,E
3,E
5,E
7,E
B
E
E
E
E
Product Specification
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
RR
BIT
1,H
BIT
3,H
BIT
5,H
BIT
7,H
1,H
3,H
5,H
7,H
1,H
3,H
5,H
7,H
C
H
H
H
H
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RR
1,L
3,L
5,L
7,L
1,L
3,L
5,L
7,L
1,L
3,L
5,L
7,L
D
L
L
L
L
Op-Code Map
1,(HL)
3,(HL)
5,(HL)
7,(HL)
1,(HL)
3,(HL)
5,(HL)
7,(HL)
1,(HL)
3,(HL)
5,(HL)
7,(HL)
RRC
SRA
RES
RES
RES
RES
(HL)
(HL)
(HL)
SRL
(HL)
SET
SET
SET
SET
BIT
BIT
BIT
BIT
RR
E
eZ80190
RRC
SRA
RES
RES
RES
RES
SRL
SET
SET
SET
SET
BIT
1,A
BIT
3,A
BIT
5,A
BIT
7,A
1,A
3,A
5,A
7,A
1,A
3,A
5,A
7,A
RR
F
A
A
A
A
173