ISP1562BE STEricsson, ISP1562BE Datasheet - Page 19

• Manufacturer Part Number: ISP1562BE
• Manufacturer: STEricsson

Specifications of ISP1562BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 9.
Table 10.
Legend: * reset value
Table 11.
[1]
ISP1562_3
Product data sheet
Bit
5
4
3 to 0
Bit
7 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
X is 10h for OHCI1 and OHCI2; X is 20h for EHCI.
Symbol
REVID[7:0] R
Symbol
66MC
CL
reserved
STATUS - Status register (address 06h) bit description
REVID - Revision ID register (address 08h) bit description
CC - Class Code register (address 09h) bit allocation
8.2.1.5 Revision ID register
8.2.1.6 Class Code register
23
15
R
R
R
7
Access Value
Description
66 MHz Capable: This read-only bit indicates whether this device is capable of running at 66 MHz.
0 — 33 MHz
1 — 66 MHz
Capabilities List: This read-only bit indicates whether this device implements the pointer for a new
capabilities linked list at offset 34h.
0 — No new capabilities linked list is available.
1 — The value read at offset 34h is a pointer in configuration space to a linked list of new capabilities.
-
This 1-byte read-only register indicates a device-specific revision identifier. The value is
chosen by the vendor. This field is a vendor-defined extension of the device ID. The
Revision ID register bit description is given in
Class Code is a 24-bit read-only register used to identify the generic function of the
device, and in some cases, a specific register-level programming interface.
shows the bit allocation of the register.
The Class Code register is divided into three byte-size fields. The upper byte is a base
class code that broadly classifies the type of function the device performs. The middle
byte is a sub-class code that identifies more specifically the function of the device. The
lower byte identifies a specific register-level programming interface, if any, so that
device-independent software can interact with the device.
11h*
22
14
R
R
R
6
Description
Revision ID: This byte specifies the design revision number of functions.
21
13
R
R
R
5
Rev. 03 — 14 November 2008
20
12
R
R
R
4
RLPI[7:0]
BCC[7:0]
SCC[7:0]
0Ch
03h
X
[1]
…continued
19
11
R
R
R
3
Table
10.
18
10
R
R
R
2
HS USB PCI host controller
17
R
R
R
9
1
© NXP B.V. 2008. All rights reserved.
ISP1562
Table 11
16
R
R
R
8
0
18 of 93