ISP1562BE STEricsson, ISP1562BE Datasheet - Page 27

• Manufacturer Part Number: ISP1562BE
• Manufacturer: STEricsson

Specifications of ISP1562BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 35.
Address: Value read from address 34h + 2h
ISP1562_3
Product data sheet
Bit
15 to 11
10
9
8 to 6
5
4
3
2 to 0
PMC - Power Management Capabilities register bit description
Symbol
PME_S
[4:0]
D2_S
D1_S
AUX_C
[2:0]
DSI
reserved -
PMI
VER[2:0] Version: A value of 010b indicates that this function complies with PCI Bus Power Management
Description
PME Support: These bits indicate the power states in which the function may assert PME#. Logic 0
for any bit indicates that the function is not capable of asserting the PME# signal while in that power
state.
PME_S[0] — PME# can be asserted from D0
PME_S[1] — PME# can be asserted from D1
PME_S[2] — PME# can be asserted from D2
PME_S[3] — PME# can be asserted from D3
PME_S[4] — PME# can be asserted from D3
D2_Support: If this bit is logic 1, this function supports the D2 power management state. Functions
that do not support D2 must always return logic 0 for this bit.
D1_Support: If this bit is logic 1, this function supports the D1 power management state. Functions
that do not support D1 must always return logic 0 for this bit.
Auxiliary Current: This three-bit field reports the V
function.
If the Data register is implemented by this function:
If the PME# generation from D3
return a value of 000b when read.
For functions that support PME# from D3
corresponding to the maximum current required for V
111b — 375 mA
110b — 320 mA
101b — 270 mA
100b — 220 mA
011b — 160 mA
010b — 100 mA
001b — 55 mA
000b — 0 (self-powered)
Device Specific Initialization: This bit indicates whether special initialization of this function is
required, beyond the standard PCI configuration header, before the generic class device driver can
use it.
This bit is not used by some operating systems. For example, Microsoft Windows and Windows NT
do not use this bit to determine whether to use D3. Instead, it is determined using the capabilities of
the driver.
Logic 1 indicates that the function requires a device-specific initialization sequence, following
transition to D0 uninitialized state.
PME Clock:
0 — Indicates that no PCI clock is required for the function to generate PME#.
1 — Indicates that the function relies on the presence of the PCI clock for the PME# operation.
Functions that do not support the PME# generation in any state must return logic 0 for this field.
Interface Specification Rev. 1.1 .
•
•
A read from this field needs to return a value of 000b.
The Data register takes precedence over this field for V
Rev. 03 — 14 November 2008
cold
is not supported by the function (PMC[15] = 0), this field must
cold
and do not implement the Data register, bit assignments
hot
cold
aux(3V3)
aux(3V3)
auxiliary current requirements for the PCI
aux(3V3)
are:
current requirement reporting.
HS USB PCI host controller
© NXP B.V. 2008. All rights reserved.
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