ISP1562BE STEricsson, ISP1562BE Datasheet - Page 61

• Manufacturer Part Number: ISP1562BE
• Manufacturer: STEricsson

Specifications of ISP1562BE

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: LQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

NXP Semiconductors
Table 90.
Address: Content of the base address register + 04h
Table 91.
Address: Content of the base address register + 08h
Table 92.
Address: Content of the base address register + 08h
ISP1562_3
Product data sheet
Bit
6 to 5
4
3 to 0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 8
7 to 4
Symbol
reserved
IST[3:0]
Symbol
reserved
PPC
N_PORTS
[3:0]
HCSPARAMS - Host Controller Structural Parameters register bit description
HCCPARAMS - Host Controller Capability Parameters register bit allocation
HCCPARAMS - Host Controller Capability Parameters register bit description
11.2.3 HCCPARAMS register
31
23
15
R
R
R
R
0
0
0
7
0
Description
-
Isochronous Scheduling Threshold: Default = implementation-dependent. This field indicates,
relative to the current position of the executing host controller, where software can reliably update the
isochronous schedule. When IST[3] is logic 0, the value of the least significant three bits indicates the
number of microframes a host controller can hold a set of isochronous data structures, one or more,
before flushing the state. When IST[3] is logic 1, the host software assumes the host controller may
cache an isochronous data structure for an entire frame.
Description
-
Port Power Control: This field indicates whether the host controller implementation includes port
power control. Logic 1 indicates the port has port power switches. Logic 0 indicates the port does not
have port power switches. The value of this field affects the functionality of the Port Power field in
each port status and control register.
Number of Ports: This field specifies the number of physical downstream ports implemented on this
host controller. The value in this field determines how many port registers are addressable in the
operational register space. Logic 0 in this field is undefined.
The Host Controller Capability Parameters (HCCPARAMS) register is a 4-byte register,
and the bit allocation is given in
30
22
14
R
R
R
R
0
0
0
6
0
IST[3:0]
29
21
13
R
R
R
R
0
0
0
5
0
Rev. 03 — 14 November 2008
Table
28
20
12
R
R
R
R
0
0
0
4
1
reserved
reserved
reserved
91.
27
19
11
R
R
R
R
0
0
0
3
0
reserved
26
18
10
R
R
R
R
0
0
0
2
0
HS USB PCI host controller
…continued
PFLF
25
17
R
R
R
R
0
0
9
0
1
1
© NXP B.V. 2008. All rights reserved.
ISP1562
64AC
24
16
R
R
R
R
0
0
8
0
0
0
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