ISP1562BE STEricsson, ISP1562BE Datasheet - Page 82

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ISP1562BE

Manufacturer Part Number
ISP1562BE
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1562BE

Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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NXP Semiconductors
ISP1562_3
Product data sheet
Fig 9.
Fig 10. USB source differential data-to-EOP transition skew and EOP width
PCI output timing
t
t
Full-speed and low-speed timing symbols have a subscript prefix ‘F’ and ‘L’, respectively.
USBbit
DEOP
OUTPUT
OUTPUT
3.3 V
DELAY
differential
data lines
0 V
CLK
is the source jitter for differential transition to SE0 transition.
is the bit duration (USB data).
t
USBbit
Fig 8.
DELAY
INPUT
CLK
crossover point
PCI input timing
N
differential data to
SE0/EOP skew
t
USBbit
t
t
t
val(PCICLK)bs
val(PCICLK)ptp
dZ(act)
Rev. 03 — 14 November 2008
t
DEOP
;
0.285V
0.615V
t
t
su(PCICLK)ptp
su(PCICLK)bs ;
crossover point
t
d(act)Z
CC(I/O)
CC(I/O)
extended
inputs valid
(falling edge)
(rising edge)
t
h(PCICLK)
source EOP width: t
receiver EOP width: t
HS USB PCI host controller
004aaa606
© NXP B.V. 2008. All rights reserved.
0.6V
0.4V
0.2V
ISP1562
004aaa704
EOPT
EOPR
CC(I/O)
CC(I/O)
CC(I/O)
0.4V
0.6V
0.4V
0.2V
0.6V
0.2V
004aaa605
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
CC(I/O)
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