RC82562EP Intel, RC82562EP Datasheet - Page 122

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RC82562EP

Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Datasheets

Specifications of RC82562EP

Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361

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Quantity
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Part Number:
RC82562EP
Manufacturer:
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10 000
Host Software Interface
6.6.4
6.7
114
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
The priority field is the field that differentiates between pause and pause low frames. Only the three
least significant bits in this byte are considered. These three bits are compared to the FC priority
threshold configuration field:
This scheme enables the link partner to support up to 8 different priority queues. If a queue is full,
the link partner should send a FC frame with the number of the queue in the priority field. The
device is guaranteed to stop transmitting to that queue and lower priority queues.
Some examples are listed below:
Half Duplex Flow Control
The 82558 and 82559 support frame based flow control frames in both full duplex and half duplex
switched environments. It is not intended for flow control to be enabled in a shared media
environment. A flow control frame may encounter a collision in half duplex and will be
retransmitted after the backoff time. Wait After Win (described in
Modification in Switched
transmitted within a bounded delay.
Collision Backoff Modification in Switched
Environments
The 82558 and 82559 support a modification of the CSMA/CD backoff algorithm named “Wait
After Win” (WAW). When WAW is enabled, the device extends the interframe spacing gap to one
slot time after the successful retransmission of a frame that previously encountered a collision.
WAW is activated by a separate WAW configuration bit.
The WAW feature, combined with the “Half Slot Time BackOff” feature in the switch, guarantees
that any collision that occurring on a dedicated half duplex link will be resolved after the first
collision.
If the received value is equal to or less than the configured value, the frame is a pause frame.
If the received value is greater than the configured value, the frame is a pause low frame.
Assume the configured FC priority threshold value is 4 (100b).
Any FC frame with the values 000b through 100b in the priority field will cause the device to
pause (stop all transmissions). Any FC frame with the values 101b through 111b in the priority
field will cause the device to pause low (stop only transmissions in the LPQ).
Assume the configured FC priority threshold value is 0 (000b).
Any FC frame with the values 000b in the Priority field will cause the device to pause (stop all
transmissions). Any FC frame with the values 001b through 111b in the Priority field will
cause the device to pause low (stop only transmissions in the LPQ).
Assume the configured FC priority threshold value is 7 (111b).
Any FC frame with any value in the priority field will cause the device to pause (stop all
transmissions). This is the IEEE compliant mode.
Environments”) guarantees that the flow control frame will be
Section 6.7, “Collision Backoff

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