RC82562EP Intel, RC82562EP Datasheet - Page 40

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

Host Software Interface
32
Table 11. Control / Status Register
Note: The PCI Configuration space Base Address Registers (BARs) automatically request memory space
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
The CSR can be accessed as either an I/O mapped or memory mapped PCI slave.
for the CSR and I/O space for the CSR. Software may use either memory mapped or I/O mapped
mode or even use them interchangeably. In most environments, memory mapped mode is the
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SCB Command Word. This register is where software writes commands for the CU and RU.
SCB Status Word. The device places the CU and RU status for the CPU to read in this word.
SCB General Pointer. The SCB General Pointer points to various data structures in main
memory depending on the current SCB Command word.
Port Interface. This special interface allows the CPU to reset the device and force it to dump
information to main memory or perform an internal self test.
EEPROM Control Register. The EEPROM Control Register allows the CPU to read and write
to an external EEPROM.
MDI Control Register. This register allows the CPU to read and write information from
Physical Layer components through the Management Data Interface.
Early Receive Interrupt Rx Byte Count (RXBC) Register. This register allows the CPU to read
the current value in the Receive DMA byte count register. The Receive DMA byte count
register tracks the number of receive data bytes that have been placed into host memory.
Flow Control Threshold Register. This register allows the driver to set the flow control
threshold value. (This register is not included in the 82557.)
Flow Control Command Register. This register allows the driver to indicate flow control
commands to the 82558 and later devices.
Power Management Driver Register (PMDR). This register indicates power management
events to the driver.
PMDR
EEPROM Control Register
SCB Command Word
Upper Word
Reserved
Function Present State Register
Function Event Mask Register
Function Event Register
Flow Control Register
Force Event Register
SCB General Pointer
MDI Control Register
RX DMA Byte Count
Reserved
16 15
PORT
General Status
SCB Status Word
Lower Word
Reserved
General Control
Reserved
0
4h
8h
Ch
10h
14h
18h
1Ch
30h
34h
38h
3Ch
0h
20h-2Ch
Offset