RC82562EP Intel, RC82562EP Datasheet - Page 80

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

Host Software Interface
72
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
•
BYTE 9.
— 82558/82559: Bit 0 - TCP/UDP Checksum. This bit is reserved on the 82557 and 82558,
— Bit 7 - Multicast Match Wake Enable.
— Bit 6 - ARP Wake-up Enable.
— Bit 5 - Link Status Change Wake Enable. This bit is available only in the 82558 B-step
device transfers data to and from the link. Software should always set this bit to 0 when it
is issuing a configure command with more than 8 bytes.
0 = Enable.
1 = Disable.
Default - 0.
Recommended - 0.
and should be set to 0 on those devices. This bit was added for the 82559. When this bit is
set to ‘1, the 82559 provides a checksum word of incoming packets, excluding MAC
header and CRC. A detailed description of the checksum calculation and memory
structure can be found in
and
0 = Disabled.
1 = Enabled.
Default - 0.
Recommended - 0 (unless the NOS supports TCP/UDP checksum offload).
This bit is available only in the 82558 B-step. It should be set to 0 on 82557, 82558 A-
step, and 82559 devices.
This bit enables assertion of the power management event signal (PME#) upon reception
of packets that pass the multicast address filtering. The PME# signal is further gated by
the PME enable bit in the PMCSR. Although this bit is not present in the 82559, this
functionality is present through the extended wake-up packet command.
0 = Disabled.
1 = Enabled.
Default - 0 (disabled).
Recommended - 0.
This bit is available only in the 82558 B-step. It should be set to 0 on the 82557, 82558 A-
step, and 82559 devices.
This bit enables assertion of the power management event signal (PME#) upon reception
of ARP frames (as defined above). The PME# signal is further gated by the PME enable
bit in the PMCSR. Although this bit is not present in the 82559, this functionality is
present through the extended wake-up packet command.
0 = Disabled.
1 = Enabled.
Default - 0 (disabled).
Recommended - 0.
and the 82559. It should be set to 0 on the 82557 and 82558 A-step devices.
This bit enables assertion of PME# upon a link status change event. The PME# signal is
further gated by the PME enable bit in the PMCSR.
0 = Disabled.
1 = Enabled.
82559)”.
Section 6.4.3.4, “No Buffer Performance Improvements (82558