RC82562EP Intel, RC82562EP Datasheet - Page 57

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RC82562EP

Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Datasheets

Specifications of RC82562EP

Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
RC82562EP
Manufacturer:
Intel
Quantity:
10 000
6.3.5
6.3.5.1
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Table 23. MDI Control Register Location
Table 24. Management Data Pins
Management Data Interface Control Register
The Management Data Interface (MDI) Control register is a 32-bit entity at offset 10h of the CSR.
The MDI Control register is used to read and write bits from the management data Interface. More
details regarding the MDI can be found in
Section 8.1.2, “PHY Detection and
The MII Management Interface allows software to have direct control over a MII compatible PHY
through a control register in the device. This allows the driver software to place the PHY in specific
modes such as full duplex, loopback, power down, etc., without the need for specific hardware pins
to select the desired mode. This register, called the MDI Control register, resides at offset 10h in
the Control register block. The CPU writes commands to this register and the Ethernet controller
reads or writes control and status parameters to the PHY device through a serial, bi-directional data
pin called Management Data Input/Output (MDIO). These serial data transfers are clocked by the
management data clock output from the LAN controller.
MDI Control Register
The MDI register may be written as a 32-bit entity, two 16-bit entities, or four 8-bit entities. When
writing to the MDI register using word or byte access, the data is latched only on the write to the
most significant byte of the register, which is located at offset 13h. Thus, the high byte should be
written last.
MDIO
MDC
Symbol
EEPROM Control Register
Upper Word (D31:D16)
SCB Command Word
In/Out
Out
Type
Management Data Input/Output. MDIO is a bi-directional signal between the device
and an MII compatible PHY. It is used to transfer control information and status
between the device and the PHY. Control information is driven by the Ethernet
controller on the MDIO pin synchronously to MDC and sampled synchronously by the
PHY. Status information is driven synchronously by the PHY and sampled
synchronously by the LAN controller.
Management Data Clock. MDC provides the timing reference for transfer of control
information and status on the MDIO signal. The frequency of this clock is up to
2.5 MHz.
SCB General Pointer
MDI Control Register
PORT
Initialization”.
Section 7.1, “Management Data Interface (MDI)”
Lower Word (D15:D0)
SCB Status Word
Name and Function
Reserved
Host Software Interface
Base + 10h
Base + Ch
Base + 0h
Base + 4h
Base + 8h
Offset
and
49

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