RC82562EP Intel, RC82562EP Datasheet - Page 135

• Manufacturer Part Number: RC82562EP
• Description: IC ETH 10/100 PLC DEV CTRL 64BGA
• Manufacturer: Intel

Specifications of RC82562EP

• Rohs Status: RoHS non-compliant
• Controller Type: Ethernet Controller
• Interface: IEEE 802.3
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 64-BGA
• Current - Supply: -
• Operating Temperature: -
• Other names: 832361

7.3.12
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Special Control Register: Register 27
Opcode Command (bits 15:13)
011 Write to ASD configuration register
2
100 Read status register
101 Read jitter register
110 Read clock register
111 Reserved
Bit
15:0
Name
Special Control Register
R / W
RW
Command Data (bits 12:0)
[9] Breakdown ASD counters.
[8] Selects signal detections or transitions.
[7:6] Slow mode adaptation time configure:
[5] Signal detect force enable.
[4] Signal detect force value.
[3:2] Reserved.
[1] Disable signal detect high threshold value.
[0] Disable signal detect low threshold value.
[15:14] Reserved.
[13:11] ASD command/address register.
[10:9] TMD100 transition ratio bits.
[8:7] ASD state machine state.
[6] Lock adaptation signal.
[5] Signal detect.
[4] Squelch signal.
[3:0] Coded zero.
Read cycle:
Write cycle:
Read cycle:
Write cycle:
00 = 67 ms (default)
01 = 0.5 ms
10 = 16.8 ms
11 = 134 ms
[15:0] Reflects the jitter register bits.
[1:0] Selects the register lines reflected by read.
[15:0] Clock counter value.
[0] Selects the window reflected by read.
Description
Bits 15:3 are reserved, and bits 2:0 are used for the
LED switch control.
00 = Bits 15:0
01 = Bits 21:6
1x = Bits 26:11
0 = 15:0
1 = 23:8
Physical Layer Interface
Default
127