HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 236

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Memory Management Unit (MMU)
Rev. 1.00 Dec. 27, 2005 Page 192 of 932
REJ09B0269-0100
Bit
31 to 9
8
7, 6
5, 4
3
2
1
Bit Name
SV
RC
TF
IX
Initial
Value
All 0
0
All 0
All 0
0
0
0
R/W
R
R/W
R
R/W
R
R/W
R/W
Description
These bits are always read as 0. The write value
should always be 0.
Single virtual memory mode
0: Multiple virtual memory mode
1: Single virtual memory mode
These bits are always read as 0. The write value
should always be 0.
A 2-bit random counter that is automatically updated
by hardware according to the following rules in the
event of an MMU exception.
When a TLB miss exception occurs, all of TLB entry
way corresponding to the virtual address at which
the exception occurred are checked. If all ways are
valid, 1 is added to RC; if there is one or more
invalid way, they are set by priority from way 0, in
the order way 0, way 1, way 2, way 3. In the event
of an MMU exception other than a TLB miss
exception, the way which caused the exception is
set in RC.
These bits are always read as 0. The write value
should always be 0.
TLB flush
Write 1 to flush the TLB (clear all valid bits of the
TLB to 0). When they are read, 0 is always returned.
Index mode
0: VPN bits 16 to 12 are used as the TLB index
1: The value obtained by EX-ORing ASID bits 4 to 0
Reserved
Reserved
Random counter
Reserved
number.
in PTEH and VPN bits 16 to 12 is used as the
TLB index number.

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