HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 462

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 12 Bus State Controller (BSC)
Single Read: A read access ends in one cycle when data exists in non-cachable region and the
data bus width is larger than or equal to access size. As the burst length is set to 1 in synchronous
DRAM burst read/single write mode, only the required data is output. Consequently, no
unnecessary bus cycles are generated even when a cache-through area is accessed.
Figure 12.16 shows the single read basic timing.
Rev. 1.00 Dec. 27, 2005 Page 418 of 932
REJ09B0269-0100
Figure 12.16 Basic Timing for Single Read (Auto Precharge)
A12/A11*
D31 to D0
A25 to A0
DACKn*
RD/WR
DQMxx
CKIO
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
RAS
CAS
CSn
BS
1
2
2. The waveform for DACKn is when active low is specified.
Tr
Tc1
Td1
Tde
Tap