HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 725

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.3.38 CAM Entry Table Busy Register (TSU_ADSBSY)
When CAM entry table registers (TSU_ADRH0 to TSU_ADRH31, TSU_ADRL0 to
TSU_ADRL31) are set by register writing, the ADSBSY bit in this register is set to 1 (when the
process of reflecting the contents of the CAM entry table register in the CAM controller is
completed inside the TSU, the ADSBSY bit is automatically restored to 0).
Accessing to TSU_ADRH0 to TSU_ADRH31 and TSU_ADRL0 to TSU_ADRL31 is prohibited,
while the ADSBSY bit in this register is set to 1. This register is a read-only status register, and
writing to this register is prohibited.
Bit
31 to 1 
0
Bit Name
ADSBSY
Initial
Value
All 0
0
R/W
R
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
CAM Entry Table Setting Busy
When TSU_ADRH0 to TSU_ADRH31 and TSU_ADRL0
to TSU_ADRL31 are set by register writing, the ADSBSY
bit is set to 1. When the process of reflecting the
contents of the CAM entry table register in the CAM
controller is completed inside the TSU, the ADSBSY bit
is automatically restored to 0. Accessing to TSU_ADRH0
to TSU_ADRH31 and TSU_ADRL0 to TSU_ADRL31 is
prohibited, while this bit is set to 1. Writing to this register
is also prohibited.
Rev. 1.00 Dec. 27, 2005 Page 681 of 932
Section 18 Ethernet Controller (EtherC)
REJ09B0269-0100

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