HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 292

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 8 Interrupt Controller (INTC)
As shown in table 8.5, on-chip peripheral module or IRQ interrupts are assigned to four 4-bit
groups in each register. These 4-bit groups (bits 15 to 12, bits 11 to 8, bits 7 to 4, and bits 3 to 0)
are set with values from H'0 (0000) to H'F (1111). Setting H'0 means priority level 0 (masking is
requested); H'F means priority level 15 (the highest level).
8.4.2
ICR0 is a register that sets the input signal detection mode of external interrupt input pin NMI, and
indicates the input signal level at the NMI pin. This register is initialized to H'0000 or H'8000 by a
power-on reset or manual reset, but is not initialized in standby mode.
Rev. 1.00 Dec. 27, 2005 Page 248 of 932
REJ09B0269-0100
Bit
15
14
13
12
11
10
9
8
Interrupt Control Register 0 (ICR0)
Bit Name
NMIL
NMIE
0
Initial Value
0/1*
0
0
0
0
0
0
R
R/W
R
R
R
R
R
R
R/W
Description
NMI Input Level
Sets the level of the signal input at the NMI pin.
This bit can be read from to determine the NMI
pin level. This bit cannot be modified.
0 : NMI input level is low
1 : NMI input level is high
Reserved
These bits are always read as 0. The write value
should always be 0.
NMI Edge Select
Selects whether the falling or rising edge of the
interrupt request signal at the NMI pin is
detected.
0 : Interrupt request is detected on falling edge
1 : Interrupt request is detected on rising edge of
of NMI pin input
NMI pin input

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