HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 635

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

17.3.1
SIMDR is a register that sets the SIOF0/1 operating mode. SIMDR is initialized by a power-on
reset or manual reset.
Bit
15
14
13
12
Bit Name
TRMD1
TRMD0

REDG
SIOF Mode Register (SIMDR)
Initial
Value
0
0
0
0
R/W
R/W
R/W
R
R/W
Receive Data Sampling Edge
Description
Transfer Mode
Selects transfer mode.
00: Slave mode 1
01: Slave mode 2
10: Master mode 1
11: Master mode 2
Note: For the operation in each mode, see section 17.4.3,
Reserved
This bit is always read as 0. The write value should always
be 0.
The TXD_SIO signal is transmitted at the opposite edge
where the RXD_SIO signal is sampled (see figure 17.4).
0: RXD_SIO is sampled at the falling edge of SCK_SIO
1: RXD_SIO is sampled at the rising edge of SCK_SIO
Note: This bit is valid in master mode 1 and master mode
Transfer Data Format.
2.
Rev. 1.00 Dec. 27, 2005 Page 591 of 932
Section 17 Serial I/O with FIFO (SIOF)
REJ09B0269-0100