HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 91

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Addressing
Mode
Indexed GBR
indirect
PC-relative with
displacement
PC-relative
Instruction
Format
@(R0,
GBR)
@(disp:8,
PC)
disp:8
disp:12
Effective Address Calculation Method
Effective address is sum of register GBR
and R0 contents.
Effective address is PC with 8-bit
displacement disp added. After disp is
zero-extended, it is multiplied by 2 (word)
or 4 (longword), according to the operand
size. With a longword operand, the lower 2
bits of PC are masked.
Effective address is PC with 8-bit
displacement disp added after being sign-
extended and multiplied by 2.
Effective address is PC with 12-bit
displacement disp added after being sign-
extended and multiplied by 2
(zero-extended)
(sign-extended)
(sign-extended)
H'FFFFFFFC
GBR
disp
R0
2/4
disp
disp
PC
PC
PC
2
2
&
×
×
×
+
*
+
+
+
*: With longword operand
PC + disp × 2
H'FFFFFFFC
PC + disp × 2
PC + disp × 2
GBR + R0
+ disp × 4
PC &
or
Rev. 1.00 Dec. 27, 2005 Page 47 of 932
Calculation
Formula
Word: PC + disp × 2
Longword:
PC&H'FFFFFFFC +
disp × 4
GBR + R0
PC + disp × 2
PC + disp × 2
REJ09B0269-0100
Section 2 CPU