HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 530

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Direct Memory Access Controller (DMAC)
Bus Modes: There are two bus modes: cycle steal and burst. Select the mode in the TB bits of the
channel control register (CHCR).
• Cycle-Steal Mode
Figure 13.9 shows an example of DMA transfer timing in the cycle steal mode. Transfer
conditions shown in the figure are:
1. Dual address mode
2. DREQ low level detection
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REJ09B0269-0100
In the cycle-steal mode, the bus mastership is given to another bus master after a one-transfer-
unit (byte, word, long-word, or 16 bytes unit) DMA transfer. When another transfer request
occurs, the bus masterships are obtained from the other bus master and a transfer is performed
for one transfer unit. When that transfer ends, the bus mastership is passed to the other bus
master. This is repeated until the transfer end conditions are satisfied.
In the cycle-steal mode, transfer areas are not affected regardless of settings of the transfer
request source, transfer source, and transfer destination.
D31 to D0
D31 to D0
A25 to A0
A25 to A0
Figure 13.8 Example of DMA Transfer Timing in Single Address Mode
DACKn
DACKn
CKIO
CKIO
CSn
CSn
WE
RD
(b) External memory space (ordinary memory) → external device with DACK
(a) External device with DACK → external memory space (ordinary memory)
Address output to external memory space
Select signal to external memory space
Write strobe signal to external memory space
Data output from external device with DACK
DACK signal (active-low) to external device with DACK
Address output to external memory space
Select signal to external memory space
Read strobe signal to external memory space
Data output from external memory space
DACK signal (active-low) to external device with DACK