HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 719

MPU 1.5/3.3V 0K PB-FREE 256-BGA

HD6417712BPV

Manufacturer Part Number
HD6417712BPV
Description
MPU 1.5/3.3V 0K PB-FREE 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH Ethernetr
Datasheet

Specifications of HD6417712BPV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, FIFO, SCI, SIO
Peripherals
DMA, POR, WDT
Number Of I /o
24
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417712BPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.3.35 Relay Status Interrupt Mask Register (TSU_FWINMK)
TSU_FWINMK is a 32-bit readable/writable register that sets the interrupt mask for status bits in
TSU_FWSR.
Bit
6
5
4
3
2
1
0
Bit
31 to 28 
27
Bit Name
RBSY1
RINT51
RINT41
RINT31
RINT21
RINT11
Bit Name
TINTM40
Initial
Value
0
0
0
0
0
0
0
Initial
Value
All 0
0
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
MAC-0 Carrier Not Detect Interrupt Mask
0: Interrupts disabled
1: Interrupts enabled
Description
MAC-1 Overflow Alert Signal Output
Set to 1 when the threshold of TSU_BSYSL1 is valid
and exceeded
Reserved
This bit is always read as 0. The write value should
always be 0.
MAC-1 Residual Bit Frame Receive
Set to 1 when frames containing residual bits (less than
an 8-bit unit) are received in the MAC-1
MAC-1 Exceeding Byte Frame Receive
Set to 1 when frames exceeding the value set by
RFLR1 are received in the MAC-1
MAC-1 Less 64-Byte Frame Receive
Set to 1 when frames with a length of less than 64
bytes are received in the MAC-1
MAC-1 Frame Receive Error
Set to 1 when a receive error is detected on the RX-ER
pin input from the PHY in the MAC-1
MAC-1 CRC Error Frame Receive
Set to 1 when a receive frame results in a CRC error in
the MAC-1
Rev. 1.00 Dec. 27, 2005 Page 675 of 932
Section 18 Ethernet Controller (EtherC)
REJ09B0269-0100

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