HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 390

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 12 Bus State Controller (BSC)
Rev. 1.00 Dec. 27, 2005 Page 346 of 932
REJ09B0269-0100
Bit
30
29
28
27
26
25
Bit Name
IWW2
IWW1
IWW0
IWRWD2
IWRWD1
IWRWD0
Initial
Value
0
1
1
0
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Idle Cycles between Write-Read Cycles and Write-Write
Cycles
These bits specify the number of idle cycles to be inserted
after the access to a memory that is connected to the
space. The target access cycles are the write-read cycle
and write-write cycle.
000: No idle cycle inserted
001: 1 idle cycle inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted
Idle Cycles for Another Space Read-Write
Specify the number of idle cycles to be inserted after the
access to a memory that is connected to the space. The
target access cycle is a read-write one in which continuous
accesses switch between different spaces.
000: No idle cycle inserted
001: 1 idle cycles inserted
010: 2 idle cycles inserted
011: 4 idle cycles inserted
100: 6 idle cycles inserted
101: 8 idle cycles inserted
110: 10 idle cycles inserted
111: 12 idle cycles inserted