HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 627

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 16.6 The SCIF Interrupt Sources
Note:
16.6
Note the following when using the SCIF.
SCFTDR Writing and TDFE Flag: The TDFE flag in SCFSR is set when the number of
transmit data bytes written in SCFTDR has fallen to or below the transmit trigger number set by
bits TTRG1 and TTRG0 in SCFCR. After the TDFE flag is set, transmit data up to the number of
empty bytes in SCFTDR can be written, allowing efficient continuous transmission.
However, if the number of data bytes written in SCFTDR is equal to or less than the transmit
trigger number, the TDFE flag will be set to 1 again after being read as 1 and cleared to 0. TDFE
clearing should therefore be carried out when SCFTDR contains more than the transmit trigger
number of transmit data bytes.
The number of transmit data bytes in SCFTDR can be found from bits 12 to 8 in SCFDR.
SCFRDR Reading and RDF Flag: The RDF flag in SCFSR is set when the number of receive
data bytes in SCFRDR has become equal to or greater than the receive trigger number set by bits
RTRG1 and RTRG0 in SCFCR. After the RDF flag is set, receive data equivalent to the trigger
number can be read from SCFRDR, allowing efficient continuous reception.
However, if the number of data bytes in SCFRDR is still equal to or greater than the trigger
number after a read, the RDF flag will be set to 1 again if it is cleared to 0. The RDF flag should
therefore be cleared to 0 after being read as 1 after all receive data has been read.
The number of receive data bytes in SCFRDR can be found from bits 4 to 0 in SCFDR.
Interrupt
Source
ERI
RXI
BRI
TXI
*
Usage Notes
The RXI by the DR is enabled only in asynchronous mode.
See section 4, Exception Handling, for priorities and the relationship with non-the SCIF
interrupts.
Description
Interrupt initiated by receive error (ER) Not possible
Interrupt initiated by receive FIFO data
full (RDF) or data ready (DR)*
Interrupt initiated by break (BRK) or
overrun error (ORER)
Interrupt initiated by transmit FIFO
data empty (TDFE)
Section 16 Serial Communication Interface with FIFO (SCIF)
DMAC
Activation
Possible
Not possible
Possible
Rev. 1.00 Dec. 27, 2005 Page 583 of 932
Priority on Reset
Release
High
Low
REJ09B0269-0100