HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 664

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 17 Serial I/O with FIFO (SIOF)
Table 17.7 Setting for Number of Control Data Channels
17.4.5
Control data performs control command output to the CODEC and status input from the CODEC.
The SIOF supports the following two control data interface methods.
• Control by slot position
• Control by secondary FS
Control data is valid only when slot length is specified as 16 bits and MSB-first
transmission/reception is selected.
Control by Slot Position (Master Mode 1): Control data is transferred for all frames transmitted
or received by the SIOF by specifying the slot position of control data. This method can be used in
both SIOF master and slave modes. Figure 17.7 shows an example of control data interface timing
by slot position control.
Note: When using this control method, use PCLK as the master clock (master clock selection
Rev. 1.00 Dec. 27, 2005 Page 620 of 932
REJ09B0269-0100
Number of Channels
1
2
RXD_SIO
SIOFSYNC
TXD_SIO
SCK_SIO
(MSSEL) = 1).
Control Data Interface
Setting: TRMD = 00 or 10,
Slot No.0
Lch.DATA
TDLE = 1,
RDLE = 1,
CD0E = 1,
Figure 17.7 Control Data Interface (Slot Position)
channel 0
Slot No.1
Control
Rch.DATA
REDG = 0,
TDLA3 to TDLA0 = 0000,
RDLA3 to RDLA0 = 0000,
CD0A3 to CD0A0 = 0001,
Slot No.2
CD0E
1
1
channel 0
Slot No.3
Control
1 frame
FL = 1110 (Frame length: 128 bits),
TDRE = 1,
RDRE = 1,
CD1E = 1,
Bit
CD1E
0
1
TDRA3 to TDRA0 = 0010,
RDRA3 to RDRA0 = 0010,
CD1A3 to CD1A0 = 0011